problems with USB Lane mapping on the TX1

Autonomous Machines Jetson & Embedded Systems Jetson TX1
1

I’ve been trying to do lane mapping on the tx1 following the examples in the adaptation and bring up guide however when I try to send the dts file back to a dtb file I get syntax errors on the
<TEGRA_PAD_CTL_PORT_HOST_ONLY> and the <TEGRA_PADCTL_PCIE_LANE_X1> and the phys lines listed in the adaptation and bring up guide. Has anyone else been having these issues and if so how did you fix them?

2

Look for the file pinctr-tegra21x-padctl-uphy.h, you can manually replace the entries.

TEGRA_PADCTL_PORT_HOST_ONLY = 0x1
TEGRA_PADCTL_PCIE_LANE_X1 = 0x1

3

Please share your dts and point out which line has problem.

It should be similar to

nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
4

Wayne,
That is exactly what my code has and it is giving me a syntax error.
Martin,
I have tried replacing those lines with 0x1 but if I do so I still have
problems with the Phys lines. I am also getting syntax errors with…
<&tegra_padctl_uphy TEGRA_PADCTL_UPHY_UTMI_P(2)> and
<&tegra_padctl_uphy TEGRA_PADCTL_UPHY_USB3_P(2)>. Really I’m having syntax
errors with all of the lines of that format.

5

Could you paste the error log and how you build your dts file?

6

Hi kareena.k.hudson.

Is this still an issue to support or has been fixed?
Please update the status to move this issue forward.

Thanks