验证环境：Thor DevKit + Jetpack 7.1
系统配置：
- 将 Thor 模块 K57 引脚 pinmux 配置为 GP_PWM09 Output
- 设备树源码文件，添加
diff --git a/hardware/nvidia/t264/nv-public/nv-platform/tegra264-p4071-0000.dtsi b/hardware/nvidia/t264/nv-public/nv-platform/tegra264-p4071-0000.dtsi
index d2243f943..808c1eb94 100644
— a/hardware/nvidia/t264/nv-public/nv-platform/tegra264-p4071-0000.dtsi
+++ b/hardware/nvidia/t264/nv-public/nv-platform/tegra264-p4071-0000.dtsi
@@ -159,6 +159,11 @@
status = “okay”;
};
- 重新升级烧录后，从 TP229 引线接示波器。
发现PWM 配置如下时（1KHz, 50%占空比），示波器有波形输出
root@thor:/home/nvidia# cat /sys/kernel/debug/pwm
0: platform/c6a0000.pwm, 1 PWM device
pwm-0 (pwm-fan ): requested enabled period: 40000 ns duty: 11451 ns polarity: normal usage_power
1: platform/810c5f0000.pwm, 1 PWM device
pwm-0 ((null) ): period: 0 ns duty: 0 ns polarity: normal
2: platform/810c610000.pwm, 1 PWM device
** pwm-0 (sysfs ): requested enabled period: 1000000 ns duty: 500000 ns polarity: normal**
3: platform/810c620000.pwm, 1 PWM device
pwm-0 ((null) ): period: 0 ns duty: 0 ns polarity: normal
4: platform/810c5c0000.tachometer, 1 PWM device
pwm-0 ((null) ): period: 0 ns duty: 0 ns polarity: normal
但将 period 调整为 10000000 或 33333333 时，都没有波形输出了，调整占空比也没有用，这是怎么回事？请帮忙实地验证，多谢。
Hi liu.jialu,
To get 30Hz PWM output(i.e. period: 33.33ms), you need to update the device tree as following.
pwm@810c610000 {
..
clock-names = "pwm\0parent";
assigned-clocks = <0x02 0x1e>;
- assigned-clock-parents = <0x02 0x16>;
+ assigned-clock-parents = <0x02 0x01>;
+ nvidia,pwm-depth = <0xFFFF>;
thanks, modified the dtsi like this:
diff --git a/hardware/nvidia/t264/nv-public/tegra264.dtsi b/hardware/nvidia/t264
/nv-public/tegra264.dtsi
index be973da08..107b3de9e 100644
--- a/hardware/nvidia/t264/nv-public/tegra264.dtsi
+++ b/hardware/nvidia/t264/nv-public/tegra264.dtsi
pwm9: pwm@810c610000 {
compatible = "nvidia,tegra264-pwm";
status = "disabled";
reg = <0x81 0x0c610000 0x0 0x10000>;
nvidia,hw-instance-id = <0x9>;
clocks = <&bpmp TEGRA264_CLK_PWM9>;
clock-names = "pwm";
+ assigned-clocks = <0x02 0x1e>;
+ assigned-clock-parents = <0x02 0x01>;
+ nvidia,pwm-depth = <0xFFFF>;
#pwm-cells = <2>;
resets = <&bpmp TEGRA264_RESET_PWM9>;
reset-names = "pwm";
but after update the dtb file, then config pwm, it reports error, like this:
root@thor:/sys/class/pwm/pwmchip2/pwm0# echo 1 > enable
bash: echo: write error: Invalid argument
root@thor:/sys/class/pwm/pwmchip2/pwm0# cat capture
cat: capture: Function not implemented
root@thor:/sys/class/pwm/pwmchip2/pwm0# cat duty_cycle
500000
root@thor:/sys/class/pwm/pwmchip2/pwm0# cat period
1000000
root@thor:/sys/class/pwm/pwmchip2/pwm0# cat polarity
normal
root@thor:/sys/class/pwm/pwmchip2/pwm0# cat /sys/kernel/debug/pwm
0: platform/c6a0000.pwm, 1 PWM device
pwm-0 (pwm-fan ): requested enabled period: 40000 ns duty: 12079 ns polarity: normal usage_power
1: platform/810c5f0000.pwm, 1 PWM device
pwm-0 ((null) ): period: 0 ns duty: 0 ns polarity: normal
2: platform/810c610000.pwm, 1 PWM device
pwm-0 (sysfs ): requested period: 1000000 ns duty: 500000 ns polarity: normal
3: platform/810c620000.pwm, 1 PWM device
pwm-0 ((null) ): period: 0 ns duty: 0 ns polarity: normal
4: platform/810c5c0000.tachometer, 1 PWM device
pwm-0 ((null) ): period: 0 ns duty: 0 ns polarity: normal
but set to 30Hz, it works well
root@thor:/sys/class/pwm/pwmchip2/pwm0# echo 33333333 > period
root@thor:/sys/class/pwm/pwmchip2/pwm0# echo 2000000 > duty_cycle
root@thor:/sys/class/pwm/pwmchip2/pwm0# echo 1 > enable
is that right? can not set to 1KHz but can set to 30Hz
Could you share the result of ls -l /sys/class/pwm/ on your board?
Which PWM do you want to use?
It seems the original requirement with 30Hz(i.e. 33.33ms period) working in your case after updating the device tree.
What’s the required frequency for PWM output?
nvidia@thor:~$ ls -l /sys/class/pwm
total 0
lrwxrwxrwx 1 root root 0 Jul 12 2025 pwmchip0 -> ../../devices/platform/bus@0/c6a0000.pwm/pwm/pwmchip0
lrwxrwxrwx 1 root root 0 Jul 12 2025 pwmchip1 -> ../../devices/platform/bus@0/810c5f0000.pwm/pwm/pwmchip1
lrwxrwxrwx 1 root root 0 Jul 12 2025 pwmchip2 -> ../../devices/platform/bus@0/810c610000.pwm/pwm/pwmchip2
lrwxrwxrwx 1 root root 0 Jul 12 2025 pwmchip3 -> ../../devices/platform/bus@0/810c620000.pwm/pwm/pwmchip3
lrwxrwxrwx 1 root root 0 May 26 19:31 pwmchip4 -> ../../devices/platform/bus@0/810c5c0000.tachometer/pwm/pwmchip4
是的，升级新的设备树配置后，/sys/class/pwm/pwmchip2 可以成功输出 30Hz 的 PWM 波，
但是再给它配置为 1KHz PWM 输出时，就会报错。
是每个设备树配置都有对应的 PWM 输出频率范围吗？
Could 1KHz PWM output work before you update the device tree?
Yes, the PWM output frequency is strongly relating to their parent clock frequency.
Please keep the following relationship in mind:
Source clock freq / ( 1 + PWM_DEPTH) / ( 1 + PFM) -> PWM output frequency
- Source clock: can be configured by assigned-clock-parents
- PWM_DEPTH: can be configured by nvidia,pwm-depth (16bits, 0 to 65535)
- PFM: calculated by PWM driver (16bits, 0 to 65535)
- PWM output frequency: the expected rate configured by user
是的，升级设备树之前是可以配置为 1KHz 的，示波器也可以量到对应的波形。
之前 1KHz 的配置如下：
root@thor:/home/nvidia# cat /sys/kernel/debug/pwm
0: platform/c6a0000.pwm, 1 PWM device
pwm-0 (pwm-fan ): requested enabled period: 40000 ns duty: 11451 ns polarity: normal usage_power
1: platform/810c5f0000.pwm, 1 PWM device
pwm-0 ((null) ): period: 0 ns duty: 0 ns polarity: normal
> 2: platform/810c610000.pwm, 1 PWM device
> pwm-0 (sysfs ): requested enabled period: 1000000 ns duty: 500000 ns polarity: normal
3: platform/810c620000.pwm, 1 PWM device
pwm-0 ((null) ): period: 0 ns duty: 0 ns polarity: normal
4: platform/810c5c0000.tachometer, 1 PWM device
pwm-0 ((null) ): period: 0 ns duty: 0 ns polarity: normal
Yes, the result is expected as you need to configure the device tree to select the suitable clock and PWM_DEPTH based on your PWM output requirement.