PWR_LED pin control

Hi,
we have a custom design with Orin NX and would like to use GPIO04 as input. It works perfectly in Linux but it seems that before Linux the bootloader configures that pin to output and sets it to high. According to the Orin Nano Devkit schematics GPIO04 is used as PWR_LED_CTRL signal.

Is it possible to prohibit the bootloader to use this pin? I couldn’t find anything meaningful in the bootloader devicetree and config files.

Hi bontond.kardos,

What’s your Jetpack version in use?

Have you configured pinmux for this pin correctly?

Do you mean in UEFI stage?

Hi Kevin,
sorry, I forgot about the environment. So it is JetPack 5.1.1, L4T 35.3.1.
No, it’s not UEFI, it happens in the very early stages, less than 1s after power-on. We have a reset button and if I press it when GPIO04 becomes high, the boot process stops at about 0.73s:

[0000.683] I> Task: Update FSI SCR with thermal fuse data (0x50021e61)
[0000.689] I> Task: Enable WDT 5th expiry (0x50021a41)
[0000.694] I> Task: I2C register (0x50000b85)
[0000.698] I> Task: Reset FSI (0x500148b1)
[0000.702] I> Task: Pinmux init (0x5001397d)
[0000.706] I> skipped mmio_addr = 0x9240008
[0000.710] I> skipped mmio_addr = 0x9240000
[0000.714] I> skipped mmio_addr = 0x9240010
[0000.718] I> skipped mmio_addr = 0x9240018
[0000.722] I> skipped mmio_addr = 0x9240020
[0000.726] I> skipped mmio_addr = 0x9240030
[0000.730] I> skipped mmio_addr = 0x9240028

(SYS_RESET asserted, boot stopped here)

So I assume “Task: pinmux init” may have initialized pins and set GPIO04 to 1.
Later on the linux kernel thinks this pin is unused:

$ gpioinfo | grep PCC.01
line 13: “PCC.01” unused output active-high

Thanks for any hint!

The log you shared seems in MB1 stage.

Have you configured the pinmux for this pin (GPIO04) through pinmux spreasheet?

Hi Kevin,
thanks for the hint. It turned out that column AL of the spreadsheet contains the init values of the GPIO pins, but this column is hidden/compressed in the spreadsheet. After having changed the init value, GPIO04 gets configured properly during boot-up.

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