Question about AGX Xavier PCIE Reset

Robotics & Edge Computing Jetson & Embedded Systems Jetson AGX Xavier
1

hello!, I have some Question about AGX Xavier PCIE Reset.

I inserted the LTE Module into the AGX Xavier KEY-E (M.2) Connector and used it.

LTE Module is M.2 KEY-E Type Form-factor but signal I/F is USB 2.0.

If the PCIE Reset signal of the KEY-E M.2 Connector is measured with an oscilloscope, it continues to show as Low and the device is not recognized.

Question

  1. We inquire about the conditions under which AGX Xavier PCIE Reset Signal becomes HIGH.
  2. If PCIE TX/RX signal is not connected between AGX Xavier and PCIE Device, does Xavier not output PCIE Reset signal as HIGH?

Thank you for your reply.

3

Its default state is HIGH. When the PCIe controller goes for the link up, it asserts and then de-asserts (so that the endpoint perceives reset) and then checks for link up. If the link is up, you should be able to see the PERST# be in de-asserted state i.e. HIGH state.

5

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