Hi, so I’d like to use ADV7282-M it is a bridge IC to convert NTSC to CSI (Data is 1 lane), this IC’s supplier is Analog Devices.
Now I’v reached to following,
If you have any adivce, could you please give me it.
And if this is out of the aim of this forum, please indicate it me.
@takashi
You should search the forum for this chip. I know some people have make this work before. Also try the v4l2-ctl instead of cheese.
v4l2-ctl -d /dev/video0 --set-fmt-video=width=1280,height=720, --set-ctrl bypass_mode=0 --stream-mmap --stream-count=1 --stream-to=t.raw
Thanks for reply!
I’d like to try it.
I tried suggested command but I cannot get any data.
*I’d like to use CSI lane #4(CSI E)
The “dmesg” command shows following log.
Do you have any idea?
[ 119.568207] tegra_mipi_cal 3990000.mipical: Mipi cal timeout,val:9881, lanes:300000
[ 119.577071] tegra_mipi_cal 3990000.mipical: MIPI_CAL_CTRL 0x04 0x2a000010
[ 119.585503] tegra_mipi_cal 3990000.mipical: CIL_MIPI_CAL_STATUS 0x0c 0x00009881
[ 119.593882] tegra_mipi_cal 3990000.mipical: CIL_MIPI_CAL_STATUS_2 0x10 0x00000000
[ 119.602202] tegra_mipi_cal 3990000.mipical: CILA_MIPI_CAL_CONFIG 0x18 0x00200000
[ 119.610515] tegra_mipi_cal 3990000.mipical: CILB_MIPI_CAL_CONFIG 0x1c 0x00200000
[ 119.618863] tegra_mipi_cal 3990000.mipical: CILC_MIPI_CAL_CONFIG 0x20 0x00000000
[ 119.627184] tegra_mipi_cal 3990000.mipical: CILD_MIPI_CAL_CONFIG 0x24 0x00000000
[ 119.635521] tegra_mipi_cal 3990000.mipical: CILE_MIPI_CAL_CONFIG 0x28 0x00000000
[ 119.643849] tegra_mipi_cal 3990000.mipical: CILF_MIPI_CAL_CONFIG 0x2c 0x00000000
[ 119.652188] tegra_mipi_cal 3990000.mipical: DSIA_MIPI_CAL_CONFIG 0x3c 0x00000200
[ 119.660478] tegra_mipi_cal 3990000.mipical: DSIB_MIPI_CAL_CONFIG 0x40 0x00000200
[ 119.668774] tegra_mipi_cal 3990000.mipical: DSIC_MIPI_CAL_CONFIG 0x44 0x00000200
[ 119.677069] tegra_mipi_cal 3990000.mipical: DSID_MIPI_CAL_CONFIG 0x48 0x00000200
[ 119.685358] tegra_mipi_cal 3990000.mipical: MIPI_BIAS_PAD_CFG0 0x5c 0x00000000
[ 119.693661] tegra_mipi_cal 3990000.mipical: MIPI_BIAS_PAD_CFG1 0x60 0x00000000
[ 119.701947] tegra_mipi_cal 3990000.mipical: MIPI_BIAS_PAD_CFG2 0x64 0x00010010
[ 119.710250] tegra_mipi_cal 3990000.mipical: DSIA_MIPI_CAL_CONFIG_2 0x68 0x00000002
[ 119.718523] tegra_mipi_cal 3990000.mipical: DSIB_MIPI_CAL_CONFIG_2 0x6c 0x00000002
[ 119.726810] tegra_mipi_cal 3990000.mipical: DSIC_MIPI_CAL_CONFIG_2 0x74 0x00000002
[ 119.735086] tegra_mipi_cal 3990000.mipical: DSID_MIPI_CAL_CONFIG_2 0x78 0x00000002
[ 120.744254] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[ 121.748251] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[ 122.752253] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[ 123.756267] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[ 124.760268] tegra-vi4 15700000.vi: ATOMP_FE syncpt timeout!
Enable the trace to get more information.
https://elinux.org/Jetson_TX2/28.1_Camera_BringUp
Hi, thanks to gave me an advice.
I attach the updated log message.
Could you please check it?
I relied my colleague of software team to get it.
And I attach the part of device tree.
Could you please check this too? (It is from my SW colleague too.)
ktrace_0203-1.txt (3.76 KB)
device-tree.txt (1.56 KB)
Excuse me, I’d like to add more one question. This is about physical lane connection.
Now I’d like to use CSI4 lane.
The CSI4_CLK+/- and CSI_D0+/- are connected to ADV7282-M.
In such a case, should CSI_D1+/- be connected to PullUP/GND? or should they be OPEN?
Could you please teach me the correct connection about un-used CSI data pin.
regards,
takashi.hayakawa.js,
If you are using CSI#4 and configure it as one-lane, then CSI_D1+/- should be OPEN.
Dear chijen,
Thanks to gave me a reply!
Now I’m using CSI4_D1+/- is OPEN.