Questions about cache addressing

I’m curious as to whether the L1 and L2 caches on the Jetson AGX Orin employ virtual or physical addresses. If, for instance, the L1 cache is addressed by virtual address, does it undergo automatic flushing when a Streaming Multiprocessor (SM) switches computation workloads between different processes? This would be crucial to prevent potential data leakage.

Sorry for the late response, our team will do the investigation and provide suggestions soon. Thanks

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If this about CPU caches or GPU Cache?
If it is CPU, CPU caches cache data based on Physical address. As data in CPU L1 and L2 caches are tagged with Physical Address, There is no need flush caches on context switch.

If that’s GPU, the GR internal caches are virtually tagged (and thus presumably are flushed as part of a context switch); the GPU L2 is physically tagged.

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Thanks for your response. I mean GPU cache.

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