Questions about Frame Sync Signal


I’ve learnt that Frame Sync Signal for cameras are generated by Xavier SoC.
My questions are:

  1. How Xavier generates the signal? Is it synced with other source like system clock?
  2. What’s the frequency of frame sync signal? Can we set that?


Hi wenbinjlumj,

May I know this topic is for Drive or Jeston platform first? Thanks!

Hi VickNV,

It’s for Drive platform.


Also I saw there’s an external sync mode in ipp_raw. How does that work?

Once you eanble the external synchronization, it will configure external devices accordingly.

You can take a look at the source code in ~/nvidia/nvidia_sdk/DRIVE_Software_10.0_HW_Linux_OS_E3550/DRIVEOS/drive-t186ref-linux/samples/ directory for details.

Hi VickNV,

Thanks for reply.

How about the original questions?

I’ll check this internally and get back to you here. Thanks!

The frame sync signal is from Xavier SoC generating a PWM signal on a GPIO pin that is connected to all deserializers. This common PWM signal is then forwarded to all 16 GMSL cameras to achieve frame synchronization. But it’s not configurable.

For Xavier, which pin provides the frame synchronization signal? If I use external frame synchronization, how can I configure the hardware