Questions about Orin Pinmux

Ive been going through the schematic checklist and pinmux and a few questions came up.

  • We want to use PCIe C0 x1 and not USB 3.2 P0 on UPHY lane 0. The data lanes can be changed in the pinmux but the refclk and PERST/CLKREQ pins are grayed out and don’t have alt functions to assign. Do I need to use different pins?
  • Which initial states are required for SPI pins? It seems like some of the alt FNs have this set and some don’t.
  • For display, its currently set to DP mode but we plan on using HDMI. Do I need to change this or can it be changed at the devicetree level like on the Xavier.

We are working on some clarifications to the UPHY mapping, and this will be explained in the next DG release.

Is your question more related to the “Required Initial State” entry in the pinmux configuration file? If so, then you can specify the desired state to match the device being used.

No pinmux setting changes are needed to switch from dp to hdmi
In past also, there was no pinmux change.

But note that, HDMI is not supported by default in Jetson ORIN.
If customer is making a cvb for HDMI, they need to change kernel dtb with changed display blob using dcb tool which display team will make public

Any estimate on when the updated design guide will be released? We will be finishing our design very soon.

hi, dear kaycc, we want to use HDMI, too. so if there are any course for this change? and does the display team has any plan to release the dcb tool, and when ?

@kayccc we want to use HDMI, too. so if there are any course for this change? and does the display team has any plan to release the dcb tool, and when ?

After jp5.0 GA.

what’s the dcb tool function?