R38.2 JP7.0 How to read the rotational speed of a fan

Robotics & Edge Computing Jetson Systems Jetson Thor
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1

hi:

Now wo add the new fan, how to configure the tach pin reading speed

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It might be to refer to this configuration, but I don’t know what the address is

tachometer@810c5c0000 {
			compatible = "nvidia,pwm-tegra264-tachometer";
			status = "disabled";
			reg = <0x81 0x0c5c0000 0x0 0x10>;
			#pwm-cells = <2>;
			clocks = <&bpmp TEGRA264_CLK_CLK1M>;
			resets = <&bpmp TEGRA264_RESET_TACH0>;
			clock-names = "tach";
			reset-names = "tach";
			pulse-per-rev = <2>;
			capture-window-length = <2>;
			disable-clk-gate;
		};
3

Hi mingming,

Could you use the default FAN_TACH(E54) pin to get the rpm of the default PWM FAN?

Have you configured NV_THERM_FAN_TACH1 for GPIO45(B54) as following in pinmux spreadsheet?
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4

hi：

pinmux 有配置，现在的问题是 没有节点生成，没有路径读取

soc-fan的节点是有的，可以读取，/sys/devices/platform/bus@0/810c5c0000.tachometer/hwmon/hwmon2/rpm

 751             soc_gpio127_pl3 { 
 752                 nvidia,pins = "soc_gpio127_pl3";
 753                 nvidia,function = "nv_therm_fan_tach1";
 754                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 755                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 756                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 757                 nvidia,drv-type = <TEGRA_PIN_1X_DRIVER>;
 758                 nvidia,e-io-od = <TEGRA_PIN_DISABLE>;
 759                 nvidia,e-lpbk = <TEGRA_PIN_DISABLE>;
 760             };

我看资源配置那里就没有这个gpio45 的配置

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5

Please refer to how tachometer@810c5c0000 configure for SoC FAN to create another node for you second fan.

6

hi：

参考这个写的话，现在有几点不是很清楚

tachometer@810c5c0000 {
			compatible = "nvidia,pwm-tegra264-tachometer";
			status = "disabled";
			reg = <0x81 0x0c5c0000 0x0 0x10>;
			#pwm-cells = <2>;
			clocks = <&bpmp TEGRA264_CLK_CLK1M>;
			resets = <&bpmp TEGRA264_RESET_TACH0>;
			clock-names = "tach";
			reset-names = "tach";
			pulse-per-rev = <2>;
			capture-window-length = <2>;
			disable-clk-gate;
		};

第一点：gpio45的地址不知道是哪个tachometer@810c5c0000

reg 这个不知道怎么填 reg = <0x81 0x0c5c0000 0x0 0x10>;

第二点：clock 和reset 怎么填呢

clocks = <&bpmp TEGRA264_CLK_CLK1M>;
			resets = <&bpmp TEGRA264_RESET_TACH0>;
7

It should be tachometer@810c5d0000.

As following.

clocks = <&bpmp TEGRA264_CLK_CLK1M>;
resets = <&bpmp TEGRA264_RESET_TACH1>;

I’ve checked with internal that TACH1 is not supported in current JP7.0GA release.
Some configuration should be implemented in the different firmwares.
We are working on enabling them and verify internally.
Please wait for the next JP7.1 release to support this.