RAW12 support for custom camera sensor - dtsi & v4l driver

Hello,

I’m looking to create a custom driver for a device which transmits RAW12 information over 4 CSI lanes into the TX2.

Following the instructions in Tegra_Linux_Driver_Package_Documents_R27.1, under sensor driver programming guide:

  • For the device tree configuration, only bayer bggr patterns are listed.
  • Would RG12 work if I were to enter that, and is it supported?

Also, the paths in the documentation don’t seem to quite line up w/ the stock file system. After installing the kernel sources, is the right path to the camera platforms dtsi in:
/hardware/nvidia/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-camera.dtsi?

Thanks

@xtracrispy
The RAW12 is support you can reference to the …/kernel/kernel-4.4/drivers/media/i2c/imx185.c
The document will update soon for next release.

I don’t have any imx185 to test but MEDIA_BUS_FMT_SRGGB12_1X12 seems to be not working correctly.
One package of 12 bit coming from CSI is not correctly mapped to the 16 bit placed in memory.
Like said on the other thread of me: https://devtalk.nvidia.com/default/topic/1016796/jetson-tx2/porting-ar0135-ds90ub964-driver-to-jetson-tx2-chansel-fault-/post/5185279/?offset=16#5185561

12 bit Pixel data gets shifted 2 bits to the left and the 2 most significant pixels of the incoming csi pixel is mirrored to the lower ones.
I’ll try explaining in a different approach to my own thread as I guess this is more clear:
00AA AAAA AAAA AAXX

A is the 12 bit pixel value
X seem to be mirrored pixels and have the same value as the 2 most significant bits of A.

I expect something like this
0000 AAAA AAAA AAAA
or this which is also acceptable (and very similar to the way the iMX.6 of us does)
AAAA AAAA AAAA 0000

In the device tree belonging to the imx185 I’ve found this:

dynamic_pixel_bit_depth = "12";
csi_pixel_bit_depth = "12";
mode_type = "bayer";
pixel_phase = "rggb";

But adding this to my driver and also the usage of MEDIA_BUS_FMT_SRGGB12_1X12 doesn’t fix my issue.

Our team now has access to an external CSI testpattern generator. We are pretty sure that is has to be an issue on the TX2’s CSI/VI side.

hello azeps,

i had share the raw memory format description in this topic.
https://devtalk.nvidia.com/default/topic/1016796/jetson-tx2/porting-ar0135-ds90ub964-driver-to-jetson-tx2-chansel-fault-/post/5186934/#5186934