Recommended padstack SEAM connector

Hello fellow developers,

I’m going to design our own carrierboard, and started with designing the Samtec SEAM connector in our software. I found the document containing the recommended padstack (http://suddendocs.samtec.com/prints/seam-xx-xx.x-xx-xx-x-xx-footprint.pdf) but I’m missing some information.

It notes the recommended pad size (0.64 mm) and stencil opening (0.89 mm) but it doesn’t tell the recommended soldermask opening. As the stencil pad is way larger than the copper pad, I assume the soldermask opening will also be larger than the copper pad…?

Can anyone tell for sure or maybe has some experience already running this connector through production?

Thanks in advance,

Falco

Hi Ice,

Yes, soldermask is larger than pad but smaller than stencil opening, you can refer to this video for better understanding: https://www.youtube.com/watch?v=6XHw4Mf1gI0

I understand, but is there an advice for any size specific? Or should I just go with the standard tolerances from my PCB manufacturer?

There is a carrier board layout file in download center, http://developer.nvidia.com/embedded/dlc/jetson-tx1-tx2-developer-kit-carrier-board-design-files , you can take it as a type of reference, but better to consult your PCB manufacturer for sure.

Thanks, I opened the ODB database included in that package and measured the following:

Copper = 0.64mm
Soldermask = 0.74mm
Paste/stencil = 0.89mm

That’s all I need to know for now, thanks again! :)

Edit; for future reference, it looks like this: