Reset on PCIe lanes on CD575M


We’re currently developping PCIe link between a TK1 based custom board and we notice a strange behavior :
while using the driver from Jetson to the external PCIe device board the driver works fine.
By adding it to our custom board it doesn’t : the reset pin level control is inverted.

While muxing reset pins in GPIO and putting it to logic 1, we successfully deassert the reset.

Any suggestion about where it comes from ? Is it possible there is another difference between the part numbers CD580M on Jetson and the CD575M sold by SiliconHighway ?


To this part, it should be same for CD580M and CD575M.
Did you test manually setting AFI_PEX0_CTRL_0[PEX0_RST_L] or AFI_PEX1_CTRL_0[PEX1_RST_L] to see the voltage level of reset pins is inverted or not?