Reset Strategy: should user carrier board drive SYS_RESET_L or PERIPHERAL_RESET_L pin?

We will design a carrier card to mount ORIN Module on it. Now we are getting into detailed design phase, and need to lock down reset design. After power-up, our carrier board will need to extend board reset timing longer than what ORIN module drives SYS_RESET_L.
1), In this case, it is clear from NVIDIA Design Guide, user should extend timing on the PERIPHERAL_RESET_L pin, don’t need to control the SYS_RESET_L pin (Design Guide V1.2, Session 5.1, page 19)
2), but the Devlopment Kits P3737 doesn’t drive PERIPHERAL_RESET_L pin at all. Its reset logic (PLD circuitry) drives SYS_RESET_L pin from P3737 carrier card.

This may not be right or wrong thing here, but what reset strategy should user carrier card use? Wondering why there are two different approaches, Guide document recommends one-way, and the reference design adopts the other way. User will need a bit insight what’s the difference between these two approaches.

Devkit does not drive PERIPHERAL_RESET_L because it does not need to extend timing.
Please follow DG for that: If the carrier board supplies required for powering on require additional time, the PERIPHERAL_RESET_N signal can be held low. This will keep the SoC and other boot devices in reset.

Thanks for the reply. This sounds a bit relief to me.
If PERIPHERAL_RESET_N signal is not tested on the P3737 platform, has this input pin been tested in any other design verification or product qualification tests? We just need a bit clarification, extending reset time on the PERIPHERAL_RESET_N pin is a feature which has been verified.

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