RGMII skew control for RXD[0:3] relative to RCLK question

I was wondering if there is the ability to adjust the skew for the RGMII RXD pins relative to Rclk. I will be connecting the RGMII interface directly to a ZYNQ FPGA RGMII interface and don’t know if I should use the PCB routing to add the required 1.8ns delay or if the Xavier has that capability.


Hi, as said in OEM DG, the max trace delay and max trace delay skew between Data & CLK should be guaranteed by routing.