RGMII skew control for TXD[0:3] relative to TXCLK question

Dear Team:
I was wondering if there is the ability to adjust the skew for the RGMII TXD pins relative to TXclk for Xavier RGMII. I will be connecting the RGMII interface directly to a Ethernet Switch MAC RGMII interface. Since the Switch chip requires additional setup time in order to avoid ingress data errors on this interface. So the Xavier has that capability of internal delay 1.8ns?
If so, how shoud do that.


Please check if any property in below document can help you or not. This file could be found in kernel source.


thanks for reply, i had read the doc:
but there isn’t anything about TXC internal delay. Could you kindly share more details about that?
or what is the Setup/Hold time of EQOS RGMII interface?
Thanks a lot

It is not supported to tune these, what we can provide are all in guide: https://developer.nvidia.com/jetson-agx-xavier-series-tuning-and-compliance-guide-application-note