Hi Karis,
Sorry that our developer has no resource at this moment. We have other sdcard issue occupied.
I will be back to you later.
BTW, could you try to add only max-tap-delay back and see if it helps?
Hi Karis,
Sorry that our developer has no resource at this moment. We have other sdcard issue occupied.
I will be back to you later.
BTW, could you try to add only max-tap-delay back and see if it helps?
Hi WayneWWW,
Thanks for your reply.
It’s the same.
Karis
Hi,
I am facing a similar issue where I got the errors mmc0: CMD CRC or end bit error, int mask and also system hangs and doesn’t recover. When I enable the external SD Card (SDMMC3), I am unable to access the shell since the driver seems to be lockup the thread. I even tried removing the min/max tap delay as mentioned in this answer but to no avail.
system setup:
I have Jetson Nano devkit B01 and we are trying to wire an SD Card slot externally to SDMMC3 as per the Product Design Guide.We have connected SDMMC_VDD_EN to 3P3.
Relevant Device tree changes:
diff --git a/nvidia/platform/t210/porg/kernel-dts/porg-platforms/tegra210-porg-pwm-fan.dtsi b/nvidia/platform/t210/porg/kernel-dts/porg-platforms/tegra210-porg-pwm-fan.dtsi
index c7c26d3..51bcb2d 100644
--- a/nvidia/platform/t210/porg/kernel-dts/porg-platforms/tegra210-porg-pwm-fan.dtsi
+++ b/nvidia/platform/t210/porg/kernel-dts/porg-platforms/tegra210-porg-pwm-fan.dtsi
@@ -26,7 +26,7 @@
step_time = <100>; /* mesecs */
state_cap = <7>;
active_pwm_max = <255>;
- tach_gpio = <&gpio TEGRA_GPIO(Z, 2) GPIO_ACTIVE_LOW>; /* TEGRA_GPIO_PZ2 */
+ tach_gpio = <&gpio TEGRA_GPIO(Z, 6) GPIO_ACTIVE_LOW>; /* TEGRA_GPIO_PZ2 */
pwm_gpio = <&gpio TEGRA_GPIO(E, 7) GPIO_ACTIVE_LOW>; /* TEGRA_GPIO_PE7 */
pwm_polarity = <PWM_POLARITY_NORMAL>;
suspend_state = <0>;
diff --git a/nvidia/platform/t210/porg/kernel-dts/porg-plugin-manager/tegra210-porg-plugin-manager.dtsi b/nvidia/platform/t210/porg/kernel-dts/porg-plugin-manager/tegra210-porg-plugin-manager.dtsi
index 67283d4..742cae2 100644
--- a/nvidia/platform/t210/porg/kernel-dts/porg-plugin-manager/tegra210-porg-plugin-manager.dtsi
+++ b/nvidia/platform/t210/porg/kernel-dts/porg-plugin-manager/tegra210-porg-plugin-manager.dtsi
@@ -308,9 +308,10 @@
override@1 {
target = <&sdhci2>;
_overlay_ {
- vmmc-supply = <&max77620_ldo6>;
+ vqmmc-supply = <&max77620_ldo6>;
+ status = "okay";
no-sdio;
- no-mmc;
+ no-mmc;
sd-uhs-sdr104;
sd-uhs-sdr50;
sd-uhs-sdr25;
diff --git a/nvidia/platform/t210/porg/kernel-dts/tegra210-porg-p3448-common.dtsi b/nvidia/platform/t210/porg/kernel-dts/tegra210-porg-p3448-common.dtsi
index 839224b..77a1d70 100644
--- a/nvidia/platform/t210/porg/kernel-dts/tegra210-porg-p3448-common.dtsi
+++ b/nvidia/platform/t210/porg/kernel-dts/tegra210-porg-p3448-common.dtsi
@@ -263,9 +263,17 @@
};
sdhci@700b0400 {
- status = "disabled";
+ status = "okay";
/delete-property/ keep-power-in-suspend;
/delete-property/ non-removable;
+
+ cd-gpios = <&gpio TEGRA_GPIO(Z, 2) 0>;
+
+ mmc-ddr-1_8v;
+ mmc-ocr-mask = <3>;
+ uhs-mask = <0x0>;
+ max-clk-limit = <400000>;
+ tap-delay = <3>;
};
sdhci@700b0200 { /* SDMMC2 for Wifi */
diff --git a/nvidia/soc/t210/kernel-dts/tegra210-soc/tegra210-sdhci.dtsi b/nvidia/soc/t210/kernel-dts/tegra210-soc/tegra210-sdhci.dtsi
index c65c30e..9e36ff3 100644
--- a/nvidia/soc/t210/kernel-dts/tegra210-soc/tegra210-sdhci.dtsi
+++ b/nvidia/soc/t210/kernel-dts/tegra210-soc/tegra210-sdhci.dtsi
@@ -93,8 +93,8 @@
cd-inverted;
wp-inverted;
pwrdet-support;
- nvidia,min-tap-delay = <106>;
- nvidia,max-tap-delay = <185>;
+ //nvidia,min-tap-delay = <106>;
+ //nvidia,max-tap-delay = <185>;
pinctrl-names = "sdmmc_schmitt_enable", "sdmmc_schmitt_disable", "sdmmc_clk_schmitt_enable", "sdmmc_clk_schmitt_disable", "sdmmc_drv_code", "sdmmc_default_drv_code", "sdmmc_e_33v_enable", "sdmmc_e_33v_disable";
pinctrl-0 = <&sdmmc3_schmitt_enable_state>;
pinctrl-1 = <&sdmmc3_schmitt_disable_state>;
Error Messages:
[2020-03-12 21:24:23.167] U-Boot 2016.07-gd917e08cec (Aug 12 2019 - 21:10:20 -0700)
[2020-03-12 21:24:23.167]
[2020-03-12 21:24:23.167] TEGRA210
[2020-03-12 21:24:23.167] Model: NVIDIA P3450-Porg
[2020-03-12 21:24:23.167] Board: NVIDIA P3450-PORG
[2020-03-12 21:24:23.168] DRAM: 4 GiB
[2020-03-12 21:24:23.457] MMC: Tegra SD/MMC: 0, Tegra SD/MMC: 1
[2020-03-12 21:24:23.457] Using default environment
[2020-03-12 21:24:23.457]
[2020-03-12 21:24:23.457] In: serial
[2020-03-12 21:24:23.457] Out: serial
[2020-03-12 21:24:23.457] Err: serial
[2020-03-12 21:24:23.457] Net: No ethernet found.
[2020-03-12 21:24:23.777] Hit any key to stop autoboot: 0
[2020-03-12 21:24:24.832] switch to partitions #0, OK
[2020-03-12 21:24:24.832] mmc1 is current device
[2020-03-12 21:24:25.648] Scanning mmc 1:1...
[2020-03-12 21:24:26.171] Found /boot/extlinux/extlinux.conf
[2020-03-12 21:24:26.171] Retrieving file: /boot/extlinux/extlinux.conf
[2020-03-12 21:24:26.299] 733 bytes read in 123 ms (4.9 KiB/s)
[2020-03-12 21:24:26.299] L4T boot options
[2020-03-12 21:24:26.315] 1: primary kernel
[2020-03-12 21:24:26.315] Enter choice: 1: primary kernel
[2020-03-12 21:24:29.305] Retrieving file: /boot/initrd
[2020-03-12 21:24:29.640] 5562384 bytes read in 296 ms (17.9 MiB/s)
[2020-03-12 21:24:29.640] Retrieving file: /boot/Image
[2020-03-12 21:24:31.236] 34111496 bytes read in 1553 ms (20.9 MiB/s)
[2020-03-12 21:24:31.236] append: tegraid=21.1.2.0.0 ddr_die=4096M@2048M section=512M memtype=0 vpr_resize usb_port_owner_info=0 lane_owner_info=0 emc_max_dvfs=0 touch_id=0@63
video=tegrafb no_console_suspend=1 console=ttyS0,115200n8 debug_uartport=lsport,0 earlyprintk=uart8250-32bit,0x70006000 maxcpus=4 usbcore.old_scheme_first=1 lp0_vec=0x1000@0xff
780000 core_edp_mv=1125 core_edp_ma=4000 root=/dev/mmcblk0p1 rw rootwait rootfstype=ext4 console=ttyS0,115200n8 console=tty0 fbcon=map:0 net.ifnames=0 root=/dev/mmcblk0p1 r
w rootwait rootfstype=ext4 console=ttyS0,115200n8 console=tty0 fbcon=map:0 net.ifnames=0 quiet
[2020-03-12 21:24:31.288] ## Flattened Device Tree blob at 83100000
[2020-03-12 21:24:31.288] Booting using the fdt blob at 0x83100000
[2020-03-12 21:24:31.288] reserving fdt memory region: addr=80000000 size=20000
[2020-03-12 21:24:31.289] Using Device Tree in place at 0000000083100000, end 000000008317bfdb
[2020-03-12 21:24:31.289]
[2020-03-12 21:24:31.289] Starting kernel ...
[2020-03-12 21:24:31.289]
[2020-03-12 21:24:32.343] <hit enter to activate fiq debugger>
[2020-03-12 21:24:32.788] [ 1.041340] tegradc tegradc.1: dpd enable lookup fail:-19
[2020-03-12 21:24:33.284] [ 1.552712] Host read timeout at address 545c00c4
[2020-03-12 21:24:33.502] [ 1.722506] tegra210-pinctrl 700008d4.pinmux: pin 206 is not registered so it cannot be requested
[2020-03-12 21:24:33.502] [ 1.731452] tegra210-pinctrl 700008d4.pinmux: pin-206 (tegra-gpio:206) status -22
[2020-03-12 21:24:33.502] [ 1.738965] pwm_fan_driver pwm-fan: fan tach gpio request failed
[2020-03-12 21:24:33.597] [ 1.868649] mmc0: CMD CRC or end bit error, int mask 0xc0000
[2020-03-12 21:24:33.640] [ 1.874735] mmc0: CMD CRC or end bit error, int mask 0xc0000
[2020-03-12 21:24:33.640] [ 1.880803] mmc0: CMD CRC or end bit error, int mask 0xc0000
[2020-03-12 21:24:33.640] [ 1.886869] mmc0: CMD CRC or end bit error, int mask 0xc0000
[2020-03-12 21:24:33.640] [ 1.892934] mmc0: CMD CRC or end bit error, int mask 0xc0000
[2020-03-12 21:24:33.847] [ 2.120440] pca953x 0-0022: failed reading register
[2020-03-12 21:24:33.868] [ 2.125875] pca953x 1-0022: failed reading register
[2020-03-12 21:24:33.900] [ 2.172658] pca953x 2-0022: failed reading register
[2020-03-12 21:24:33.957] [ 2.178464] pca953x 6-0022: failed reading register
[2020-03-12 21:24:33.957] [ 2.189055] mmc0: CMD CRC or end bit error, int mask 0xc0000
[2020-03-12 21:24:33.958] [ 2.195235] mmc0: CMD CRC or end bit error, int mask 0xc0000
[2020-03-12 21:24:33.958] [ 2.201428] mmc0: CMD CRC or end bit error, int mask 0xc0000
[2020-03-12 21:24:33.958] [ 2.207661] mmc0: CMD CRC or end bit error, int mask 0xc0000
[2020-03-12 21:24:33.958] [ 2.213830] mmc0: CMD CRC or end bit error, int mask 0xc0000
[2020-03-12 21:24:34.040] [ 2.267176] mmc0: CMD CRC or end bit error, int mask 0xe0001
[2020-03-12 21:24:34.040] [ 2.274040] mmc0: CMD CRC or end bit error, int mask 0xe0001
[2020-03-12 21:24:34.041] [ 2.280886] mmc0: CMD CRC or end bit error, int mask 0xc0001
[2020-03-12 21:24:34.041] [ 2.287281] mmc0: CMD CRC or end bit error, int mask 0xe0000
[2020-03-12 21:24:34.041] [ 2.294091] mmc0: CMD CRC or end bit error, int mask 0xe0001
[2020-03-12 21:24:34.124] [ 2.347854] mmc0: CMD CRC or end bit error, int mask 0xc0001
[2020-03-12 21:24:34.124] [ 2.355755] mmc0: CMD CRC or end bit error, int mask 0xe0001
[2020-03-12 21:24:34.125] [ 2.362976] mmc0: CMD CRC or end bit error, int mask 0xc0000
[2020-03-12 21:24:34.125] [ 2.370862] mmc0: CMD CRC or end bit error, int mask 0xe0001
[2020-03-12 21:24:34.125] [ 2.378755] mmc0: CMD CRC or end bit error, int mask 0xc0001
[2020-03-12 21:24:34.202] [ 2.430845] mmc0: CMD CRC or end bit error, int mask 0xc0001
[2020-03-12 21:24:34.202] [ 2.437616] mmc0: CMD CRC or end bit error, int mask 0xc0001
[2020-03-12 21:24:34.203] [ 2.443676] mmc0: CMD CRC or end bit error, int mask 0xc0000
[2020-03-12 21:24:34.203] [ 2.450431] mmc0: CMD CRC or end bit error, int mask 0xc0001
[2020-03-12 21:24:34.203] [ 2.456504] mmc0: CMD CRC or end bit error, int mask 0xc0000
[2020-03-12 21:24:34.250] [ 2.520983] mmc0: CMD CRC or end bit error, int mask 0xe0001
Hi arvindprksh,
I am wondering if you put these dts change to the correct sdhci driver.
Please note that “mmc0” is from the sdhci driver for on-board emmc. If you really enable the sdhci for sdcard, it should be shown as mmc1.
I have made the changes to sdhci@700b0400 and have provided dts entry of SDMMC3 from dts file decompliled from final dtb.
sdhci@700b0400 {
compatible = "nvidia,tegra210-sdhci";
reg = <0x00000000 0x00000003 0x00000013 0x00000f83>;
interrupts = <0x00000000 0x0000000e 0x6772612e>;
aux-device-name = "sdhci-tegra.2";
iommus = <0x0000002b 0x00001f46>;
nvidia,runtime-pm-type = <0x00000000>;
clocks = <0x00000021 0x00000021 0x00000003 0x6300706c 0x75743200 0x5f746d00 0x00000021 0x00000219>;
clock-names = "sdmmc", "pll_p", "pll_c4_out2", "sdmmc_legacy_tm";
resets = <0x00000021 0x00000219>;
reset-names = "sdhci";
status = "okay";
tap-delay = <0x00000003>;
trim-delay = <0x00000003>;
mmc-ocr-mask = <0x00000003>;
max-clk-limit = <0x00061a80>;
ddr-clk-limit = <0x02dc6c00>;
bus-width = <0x00000004>;
calib-3v3-offsets = <0x0000007d>;
calib-1v8-offsets = <0x00007b7b>;
compad-vref-3v3 = <0x00000007>;
compad-vref-1v8 = <0x00000007>;
pll_source = "pll_p", "pll_c4_out2";
ignore-pm-notify;
cap-mmc-highspeed;
cap-sd-highspeed;
nvidia,en-io-trim-volt;
nvidia,en-periodic-calib;
cd-inverted;
wp-inverted;
pwrdet-support;
pinctrl-names = "sdmmc_schmitt_enable", "sdmmc_schmitt_disable", "sdmmc_clk_schmitt_enable", "sdmmc_clk_schmitt_disable", "sdmmc_drv_code", "sdmmc_default_drv_code", "sdmmc_e_33v_enable", "sdmmc_e_33v_disable";
pinctrl-0 = <0x00000093>;
pinctrl-1 = <0x00000094>;
pinctrl-2 = <0x00000095>;
pinctrl-3 = <0x00000096>;
pinctrl-4 = <0x00000097>;
pinctrl-5 = <0x00000098>;
pinctrl-6 = <0x00000099>;
pinctrl-7 = <0x0000009a>;
vqmmc-supply = <0x00000036>;
vmmc-supply = <0x00000047>;
cd-gpios = <0x00000056 0x00000000 0x00002143>;
mmc-ddr-1_8v;
uhs-mask = <0x00000000>;
linux,phandle = <0x000000c2>;
phandle = <0x000000c2>;
prod-settings {
#prod-cells = <0x00000003>;
prod_c_ds {
prod = <0x00000100 0x0000000f 0x3000007d 0x5f635f68 0x000008da 0x000001e0 0x30077f7f 0x70726f64 0x00000003>;
};
prod_c_hs {
prod = <0x00000100 0x0000000f 0x3000007d 0x5f635f73 0x00000024 0x00010000 0x000001e4 0x00000001 0x00000000>;
};
prod_c_sdr12 {
prod = <0x00000100 0x0000000f 0x30007b7b 0x5f635f73 0x00000024 0x00010000 0x000001e4 0x00000001 0x00000000>;
};
prod_c_sdr25 {
prod = <0x00000100 0x0000000f 0x30007b7b 0x5f635f73 0x00000030 0x00010000 0x000001e0 0x30077f7f 0x70726f64>;
};
prod_c_sdr50 {
prod = <0x00000100 0x0000e000 0x00000007 0x00000002 0x64723130 0x000008da 0x000001c0 0x0000000f 0x30007b7b 0x5f635f64 0x00000024 0x00000000>;
};
prod_c_sdr104 {
prod = <0x00000100 0x0000e000 0x00000007 0x00000002 0x64723532 0x000008da 0x000001e0 0x30077f7f 0x70726f64 0x000008da 0x000001c0 0x00000077>;
};
prod_c_ddr52 {
prod = <0x00000100 0x0000000f 0x30007b7b 0x00000000 0x00000100 0x08001fc0 0x00000000 0x00000128 0x00080000>;
};
prod {
prod = <0x00000100 0x08001fc0 0x00000000 0x00000128 0x00080000 0x00000002 0x30623032 0x00000000 0x3231302d 0x00000010 0x00000000 0x00000207 0x00000003 0x692d7465 0x00000004 0x00000018 0x00000021 0x00000003>;
};
};
};