Setting up device tree overlay for PPS on Xavier NX

Robotics & Edge Computing Jetson & Embedded Systems Jetson Xavier NX
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6

@niall99 When you say “GPIO1” do you mean pin 29 labelled “GPIO01” on the Devkit’s 40 pin header or something else? Pin 29 on the Devkit’s 40 pin header is actually pin 118 on the module and is labelled SOC_GPIO41. It’s logical name is GPIO3_PQ.05. It’s the “Q.05” (port.offset) that determines the number to use in the DTS. There are 8 logical pins on each port so the the formula for the main gpios is as follows…

pin = (port * 8 ) + offset
where port is 
A = 0,
B = 1,
...
Q = 16,
...
Z = 25,
FF = 26,
GG = 27

So the proper gpio for Q.05 on the &tegra_main_gpio would be

(16 * 8) + 5 = 133

Now, if you’re using tools like gpioinfo on the NX, it’s a little more confusing because in reality, ports may not actually have 8 pins so the gpiochip and line numbering may not match the logical numbering you need for the overlay.

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