SI Measurement Issues on Jetson Thor Platform (PCIe / USB)

Robotics & Edge Computing Jetson Systems Jetson Thor
1

Hi Team,

We encountered several signal integrity (SI) measurement issues on the Jetson Thor platform and would like to ask for your advice.

Issue #1: PCIe for M.2 SSD and M.2 Wi-Fi

  • The PCIe interface connected to the M.2 SSD and M.2 Wi-Fi port does not output any measurement pattern during SI validation.

  • Because there is no pattern transmission, we are unable to perform PCIe SI measurements.

Issue #2: USB3.2 Gen2 and USB2.0 Measurement Through USB Hub

  • For USB3.2 Gen2 and USB2.0 signals routed through the USB3.0 Hub RTS5420 downstream ports, we are unable to perform SI measurements.

  • However, USB3.2 Gen2 and USB2.0 signals from the native Jetson Thor root ports can be measured normally.

We would like to understand:

  1. Are there any required settings, test modes, or compliance patterns that need to be enabled for PCIe SI measurements on Jetson Thor?

  2. Does the RTS5420 USB hub require any special configuration or firmware settings to enable downstream port SI measurements?

  3. Are there recommended SI validation methods for PCIe and USB interfaces on the Jetson Thor platform?

Any suggestions or reference documents would be greatly appreciated.

Thank you.

3

Please refer to Jetson Thor Series Modules I/O Verification Guide.

Chapter 2.2 covers USB 3.2 compliance.

For PCIe, Chapter 2.1 covers Eye Opening Monitor (EOM) for Rx and 2.3 covers PCIe Lane Margining for Tx.

PCIe compliance is not directly supported. If users follow the layout guidelines for PCIe in the Jetson Thor Series Modules Interface Design Guide, it is deemed that full PCIe compliance is unnecessary and the Eye Opening Monitor (EOM) and PCIe Lane Margining should be sufficient.