Some GPIO can't not be used?

Robotics & Edge Computing Jetson & Embedded Systems Jetson Thor
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1

Hi NV_Team,

We used six gpio for camera pwdn fucntion, only three gpio can be set to high, the other three gpio can’t be set high?

We can’t find these three gpios in

9edace49-fb5c-4464-8f3e-cf54dec15323
9edace49-fb5c-4464-8f3e-cf54dec153231298×204 12 KB

#These three gpio set high not okay
#define CAM2_PWDN	TEGRA264_MAIN_GPIO(V, 2)  /2 PWDN
#define CAM4_PWDN	TEGRA264_MAIN_GPIO(Q, 3)  /4 PWDN
#define CAM6_PWDN	TEGRA264_MAIN_GPIO(V, 4)  /6 PWDN

#These three gpio set high okay
#define CAM1_PWDN	TEGRA264_MAIN_GPIO(V, 5)  /1 PWDN
#define CAM3_PWDN	TEGRA264_MAIN_GPIO(Q, 2)  /3 PWDN
#define CAM5_PWDN	TEGRA264_AON_GPIO(DD, 0)  /5 PWDN

63 (spi5_miso_pq3): 
        pull=1
        tristate=1
        enable-input=0
        open-drain=1
        io-reset=1
        rcv-sel=1
        io-hv=1
        schmitt=0
        pull-down-strength=8
        pull-up-strength=8
        drive-type=1
        gpio-mode=1
        function=rsvd1


65 (spi5_sck_pq2):
        pull=0
        tristate=0
        enable-input=0
        open-drain=1
        io-reset=1
        rcv-sel=1
        io-hv=1
        schmitt=0
        pull-down-strength=8
        pull-up-strength=8
        drive-type=1
        gpio-mode=0
        function=rsvd1
3

Hi NV_Team,

Where to find the memory address for GPIOs, so we can use devmem to check it.

like this topic

4

Hi Luna2020,

If the pins cannot be found in pinmux spreadsheet, then they may not be able to be used by customer on Thor.
Some GPIOs on Thor are from FSI, which can not be accessed and be read through devmem.

5

Hi KevinFFF,

  1. where to find the devmem address for the gpios from the TRM or some other documetns ?
  2. for example PQ.03/PV.02

Thanks。

6

Hi NV_Team,

Any update?

Where to find the gpio devmem address, AGX Orin can find through TRM, but Thor not find address from TRM .

7

It seems the TRM of Thor is shared with partner only.
Do you have any contact window with NVIDIA for this requirement?

8

Hi NV_Team,

We have contacted with NV PM, and only this TRM file.

Thor-Soc-TRM_DP-11881-002_v1.0.pdf

9

Yes, it is the correct TRM for Thor.
Do you find required information in this doc?

10

Hi KevinFFF,

There is no devmem address for gpio and other pinmux can be found. If you can find the gpio devmem such as PQ.03/PV.02, please tell me which page and how to calculate it ?

thanks.

11

Hi NV_Team，

Any update ？