some question about "384-bit memory bus from device memory to L2 cache"

Accelerated Computing CUDA CUDA Programming and Performance
1

i don’t know the mean of “384-bit memory bus from device memory to L2 cache”. who can explain it?

Thank you very much.

2

“Device memory” is the memory on the graphics card, but not inside the GPU itself. The memory bus connecting the GPU to the memory is 384 bits wide. On the Fermi-class GPUs (which I assume you are talking about), all requests to memory are routed through the L2 cache, which is a small amount of on-GPU memory. If the requested memory location is in the cache, the value is returned immediately. If it is not in the cache, then the L2 cache requests the contents of a small block of memory containing the requested location from device memory.

3

“Device memory” is the memory on the graphics card, but not inside the GPU itself. The memory bus connecting the GPU to the memory is 384 bits wide. On the Fermi-class GPUs (which I assume you are talking about), all requests to memory are routed through the L2 cache, which is a small amount of on-GPU memory. If the requested memory location is in the cache, the value is returned immediately. If it is not in the cache, then the L2 cache requests the contents of a small block of memory containing the requested location from device memory.