Hi I was working with the SPE/AON on the Jetson Orin AGX, we want to use it to so some continuous basic computation (let’s say matrix multiplication) while the CCPLEX is in SC7 state, but let’s say is similar to the app/timer-app.c. We manage to execute the code, but when system goes to SC7 the computation stops. I found this old post in which they said that the SPE/AON does not compute when the CCPLEX is in SC7.
But to me this contradict a bit how the AODMIC-APP, that wakes the system when a sound threshold is met. And contradict ORIN TRM documentation, Part VI - Multimedia Complex → Always On Digital Microphone (AODMIC) → Figure 1.1 AODMIC in AON Block Diagram, that shows the sepatare power domain in the R5 Core.
So my question is, is not continuous computing in SC7 because some flag must be set, or is because the printf_isr is blocking computation until UART2 is available again when return form SC7?
Hello, ivanrodriguezferrandez:
You are right. SPE stops during SC7, though the power of AON cluster is still on.
Remove my former incorrect comment.
So AODMIC can wakeup SPE from SC7.
Hello, ivanrodriguezferrandez:
Sorry that I do not get your point.
SPE firmware is running after loaded and un-power-gated by MB2.
You can check the UART log, and message can print when SPE firmware starts.
What do you mean by ‘start the SPE (without the CCLPEX bring up) apart from the wake up the SPE from the AODMIC’.
Even with AODMIC wakeup, the SPE firmware has already run, just in suspend mode.
Hello Jachen,
basically we want to evaluate the SPE computation and power for some test, for that we though that we can do is enter in the SC7 state and evaluate the SPE alone, for that we though that we can use it similar to the AODMIC app.
What I understood base on the code provided on the AODMIC, is that the SPE is constantly checking the AODMIC
for (i = 1; ; i++) {
status = tegra_aodmic_read(&TEST_AODMIC, buf, buf_size);
if (status) {
...
continue;
}
and if a threshold is met then the wake up happens.
if ((i % 30) == 0) {
....
if ((vol_l >= SPE_CCPLEX_WAKE_THRESHOLD) ||
(vol_r >= SPE_CCPLEX_WAKE_THRESHOLD)) {
printf("aodmic_test: !!! TRIGGERING CCPLEX WAKE !!!\n\r");
wake_trigger_ccplex_wake();
}
}
So the idea is continuously computing /checking a value, and when that value is reach bring up the rest of the system. (Instead of checking sound levels checking some values produce by the R5 on the SPE).
I don’t know is this more clear for what we want to do.
Hello, ivanrodriguezferrandez:
Sorry that my former comment may be incorrect.
Please give me more time to check locally.
And I will update the this thread later.
Hello, ivanrodriguezferrandez:
Sorry to correct my former comment.
During SC7, the SPE R5 is still running.
But please note that, in SC7, almost all modules are power-gated and DDR is in self-refresh.
So even SPE R5 is still running, you cannot access those modules.
Hello, ivanrodriguezferrandez:
Basically, the modules in AON cluster are always powered on, even in the deepest sleep state. But those modules can also be shut down by processor.
What’s the module you want to access in SC7? It may have to discuss case by case.
Hello ChenJian,
Thanks for the support, for example we want to extract the execution output during the SC7. So Initially we use the debug UART to print information to an external device, that will be interesting for us to make it work. If that is not possible, using the GPIO or I2C also will be interesting to get the execution output. If any of those is not possible, what do you suggest for getting the output of the computation of the SPE during SC7?
Thanks for your time.
Sorry that I’m stuck by other tasks.
Can you also do some test in parallel?
For example, you can try to read/write AON GPIO status during SC7, and confirm whether the corresponding registers access can be done?
I will check this when my bandwidth permits but cannot guarantee the ETA.