SPE: IRQ GPIO and GPIO mapping relationship?

[Luna2020]

Hi NV_Team,

gte-tegra-hw.h defines IRQ GPIO， what is the gpio mapping to irq_gpio ?
for example
NV_AON_GTE_SLICE2_IRQ_GPIO_0 - GPIO.PAA ? or other GPIO

if we use gpio.pcc.00 as output, and gpio.pcc.01 as input interrupt , which NV_AON_GTE_SLICE2_IRQ_GPIO_? should be used ?

BTW, where to find the definition of thi mapping ?

[KevinFFF]

Hi Luna2020,

Are you using the devkit or custom board for AGX Orin?
What’s the Jetpack version in use?

May I know what’s your use case for them?

[Luna2020]

Hi KevinFFF,

AGX Orin Devkit 32GB

JetPack6.0/6.1

[Luna2020]

Hi KevinFFF,

We want to use SPE gpio to monitor the IO status and record the timestamp

• GPIO PCC.00 for the output GPIO
• GPIO PCC.01 for the input GPIO

Where to find the mapping IO ?
define NV_AON_GTE_SLICE2_IRQ_GPIO_?

[KevinFFF]

@Luna2020

if we use gpio.pcc.00 as output, and gpio.pcc.01 as input interrupt , which NV_AON_GTE_SLICE2_IRQ_GPIO_? should be used ?

You can find the pin → GTE slice mapping in the pinmux spreadsheet after you unhide the columns.
e.g. for Pin PCC.00, we have GTE_SLICE2[22] that can be mapped to NV_AON_GTE_SLICE2_IRQ_GPIO_22 in gte-tegra-hw.h.
Please refer to the following table from pinmux spreadsheet.

[Luna2020]

Hi KevinFFF,

Thanks for you information.