Spi@c260000 on Jetson AGX Xavier Industrial

[mattias.johansson]

Hi!

We are using Jetson 32.7.3, Jetson AGX Xavier Industrial on a custom board and we have run into a crash regarding SPI2 (spi@c260000).
So I tested on a p2822 devkit (B03), and I can reproduce the crash there as well. I tested with both an AGX Xavier Industrial and a “plain” AGX Xavier and the crash only occurs on the first one.

Here’s what I’ve done.

1. Using Jetson_Linux_R32.7.3_aarch64.tbz2 and Tegra_Linux_Sample-Root-Filesystem_R32.7.3_aarch64.tbz2 from download page.

2. Modified spi@c2600000 node on the dtb’s (tegra194-p2888-0001-p2822-0000.dtb and tegra192-p2888-0008-p2822-0000.dtb respectively) to:
   spi@c260000 {
   compatible = “nvidia,tegra186-spi”;
   reg = <0x0 0xc260000 0x0 0x10000>;
   interrupts = <0x0 0x25 0x4>;
   #address-cells = <0x1>;
   #size-cells = <0x0>;
   iommus = <0x2 0x20>;
   dma-coherent;
   dmas = <0x22 0x10 0x22 0x10>;
   dma-names = “rx”, “tx”;
   spi-max-frequency = <0x3dfd240>;
   nvidia,clk-parents = “pll_p”, “osc”;
   clocks = <0x4 0x88 0x4 0x5b>;
   clock-names = “spi”, “pll_p”, “osc”;
   resets = <0x5 0x5c>;
   reset-names = “spi”;
   status = “okay”;

    spi@0 {
    	compatible = "tegra-spidev";
    	reg = <0x0>;
    	spi-max-frequency = <0x1f78a40>;
   
    	controller-data {
    		nvidia,enable-hw-based-cs;
    		nvidia,rx-clk-tap-delay = <0x11>;
    	};
    };
   
    spi@1 {
    	compatible = "tegra-spidev";
    	reg = <0x1>;
    	spi-max-frequency = <0x1f78a40>;
   
    	controller-data {
    		nvidia,enable-hw-based-cs;
    		nvidia,rx-clk-tap-delay = <0x11>;
    	};
    };
   

   };

3. Using spidev_test tool: spidev_test -D /dev/spidev1.0

For the AGX Xavier Industrial I get a Data abort exception, e.g.:
spi mode: 0x0
bits per word: 8
max speed: 500000 Hz (500 KH--------------------------------------------------------------------------------
Exception: Data abort
DFAR: 0x0c180000, DFSR: 0x00001008
PC: 0x0c48073a
LR: 0x0c483b1f, SP: 0x0c4bfcc8, PSR: 0x000001b2
R0: 0x0c49542c, R1: 0x00000000, R2: 0x00020000
R3: 0x0c160000, R4: 0x00000004, R5: 0x0c49085c
R6: 0x0c49087c, R7: 0x0c496334, R8: 0x00000000
R9: 0x00000000, R10: 0x00000000, R11: 0x00000000
R12: 0x00000000
--------------------------------------------------------------------------------

For the “plain” AGX Xavier it doesn’t crash but I get an error in the dmesg log:
[ 105.646001] ERROR: could not get clock /spi@c260000:osc(2)
[ 105.648424] ERROR: could not get clock /spi@c260000:osc(2)

I have not changed anything in the pinmux for any of the Xaviers, but maybe I should have?

Regards,
Mattias

[mattias.johansson]

Update:
Tried with Jetson 35.2.1, and there it works fine!

[kayccc]

Thanks for the update, then till needs to support on R32.7.3?

[mattias.johansson]

Yes, unfortunately our customer insists of using 32.7.X.

[mattias.johansson]

Update:
After running the jeston-demux tool on the combined uart on the PC I found out that, the data abort exception comes from the SPE stream. So the SPE probably dies.

[mattias.johansson]

By reverting the changes made by t19x-common-platforms/tegra194-no-pll-aon-clock.dtsi and disabling nodes sce@b000000 and tegra-hsp@b150000 I got it working on AGX Xavier Industrial. It would be nice to have an explanation of why though…