SPI Clock Rate Change on TX2

I’m attempting to interface an ADIS16448 IMU with a TX2. The maximum SPI rate of the IMU is 2MHz. However, the default SPI clock rate of the TX2 is 50 MHz. Therefore, I need to decrease the TX2 SPI clock rate to <2MHz.

SPI is fully operational on my TX2- the spidev loopback test completes successfully. Setting the clock rate via…

ret = ioctl(fd, SPI_IOC_WR_MAX_SPEED_HZ, &speed);

…returns successfully but the clock rate is unchanged. An oscilloscope attached to the SPI_CLK pin (pin 23) on the J21 header was used to verify this clock rate.

I added kernel print statements to both the spi-tegra114 driver and the clk_set_rate() function located in kernel/drivers/clk/clk.c. All of these functions involved in setting spi clock rate seem to be called correctly and return without error.

I would greatly appreciate if someone could shed some light on what I’m doing wrong here. Has anyone successfully changed the SPI clock rate?

Did you verify the -S for like “spidev_test -D /dev/spidev0.1 -s1000000 -g8 -b8 -p0 -n1 -zzz -t” and try config the speed_hz in your transfer package instead of clk_set_rate()

struct spi_transfer {
  	/* it's ok if tx_buf == rx_buf (right?)
  	 * for MicroWire, one buffer must be null
  	 * buffers must work with dma_*map_single() calls, unless
  	 *   spi_message.is_dma_mapped reports a pre-existing mapping
  	const void	*tx_buf;
  	void		*rx_buf;
  	unsigned	len;
  	dma_addr_t	tx_dma;
  	dma_addr_t	rx_dma;
  	unsigned	cs_change:1;
  	unsigned	tx_nbits:3;
  	unsigned	rx_nbits:3;
  #define	SPI_NBITS_SINGLE	0x01 /* 1bit transfer */
  #define	SPI_NBITS_DUAL		0x02 /* 2bits transfer */
  #define	SPI_NBITS_QUAD		0x04 /* 4bits transfer */
  	u8		bits_per_word;
  	u16		delay_usecs;
  	u32		speed_hz;
  	struct list_head transfer_list;

Hi Shane,

I’m also experiencing the same problem. I tried setting the SPI speed both via the ioctl and in the spi_transfer message and unfortunately neither had any effect.

Hi Shane,

Yes, I tried setting clock speed with ioctl and in the transfer package. Neither of them seemed to change the clock rate that I was measuring on the SPI_CLK pin. Any other ideas?

Did you mean you run below command and probe the clock and didn’t see any change with any driver modified?

spidev_test -D /dev/spidev0.1 -sXXXXX -g8 -b8 -p0 -n1 -zzz -t"

Correct- the clock rate remained unchanged after running that command. This is the case for Jetpack versions 27.1 through 28.2.