Spi mode 3 does not work

Hi Team,

use spidev_test -D /dev/spidev1.0 -O -H -s 1000000 -v -p AA550000 to test SPI mode3, mode 0 and mode1 works while mode 2 and mode3 dos not work.JetPack 6.0 and 6.2 has the same phenomenon,

the phenomenon is the SCLK is always High and has no clock

*** Please note that this reply is generated by LLM automatically ***

Based on the provided context, it appears that you are experiencing issues with testing SPI modes on the Jetson Orin Nano module using the spidevtest command.

The command you provided, D devspidev10 O H s 1000000 v p AA550000, is used to test SPI mode 3, but you mentioned that mode 2 and mode 3 do not work, while mode 0 and mode 1 work.

After reviewing the provided context, I found that the Orin module brings out two SPI interfaces, SPI0 and SPI1, with multiple pins for each interface (Table 12-4). The SPI0 interface has pins for clock (SPI0_SCK), MOSI (SPI0_MOSI), MISO (SPI0_MISO), and chip select (SPI0_CS0* and SPI0_CS1*). Similarly, the SPI1 interface has pins for clock (SPI1_SCK), MOSI (SPI1_MOSI), MISO (SPI1_MISO), and chip select (SPI1_CS0* and SPI1_CS1*).

However, I did not find any specific information about the SPI mode configuration or the expected behavior of the SCLK pin in the provided context.

That being said, I can provide some general insights about SPI modes and clock behavior.

In SPI communication, the clock signal (SCLK) is used to synchronize the data transfer between the master and slave devices. The clock polarity and phase are determined by the SPI mode.

  • In mode 0, the clock is active low, and the data is sampled on the rising edge of the clock.
  • In mode 1, the clock is active low, and the data is sampled on the falling edge of the clock.
  • In mode 2, the clock is active high, and the data is sampled on the rising edge of the clock.
  • In mode 3, the clock is active high, and the data is sampled on the falling edge of the clock.

If the SCLK pin is always high and has no clock, it is possible that the SPI mode configuration is not correct or that there is an issue with the clock generation.

To troubleshoot this issue, I would recommend checking the following:

  1. Verify that the SPI mode configuration is correct for your application.
  2. Check the clock generation and ensure that it is properly configured for the desired SPI mode.
  3. Verify that the SCLK pin is properly connected and not shorted to any other pin.
  4. Try using a different SPI mode or clock configuration to see if the issue persists.

If you are still experiencing issues, please provide more information about your setup and configuration, and I will do my best to help you troubleshoot the problem.

*** Please give the thumbs up if you get answers you like. Or provide feedback to help us improve the answer. ***

duplicate topic as Spi mode 3 done not work - Jetson & Embedded Systems / Jetson Orin NX - NVIDIA Developer Forums, I’ve updated there.

This topic was automatically closed 14 days after the last reply. New replies are no longer allowed.