SPI spi_sync error

In the probe function of module_spi_driver, after spi_setup(spi), I called spi_write_then_read function in which spi_sync is called. Then tegra_spi_transfer_one_message function in file spi-tegra114.c is called.

After that log shows two errors:
[ 7.472787] ERROR: could not get clock /spi@c260000:osc(2)
[ 7.473526] ERROR: could not get clock /spi@c260000:osc(2)
The errors come from the following function:
struct clk *clk_get(struct device *dev, const char *con_id)
const char *dev_id = dev ? dev_name(dev) : NULL;
struct clk *clk;

if (dev) {
	clk = __of_clk_get_by_name(dev->of_node, dev_id, con_id);
	if (!IS_ERR(clk) || PTR_ERR(clk) == -EPROBE_DEFER)
		return clk;
return clk_get_sys(dev_id, con_id);


Can anyone help me why these errors occurs? Is this related to pinmux setting?


Check if your system have osc.

sudo cat /sys/kernel/debug/bpmp/debug/clk/clk_tree | grep -i osc

sudo cat /sys/kernel/debug/bpmp/debug/clk/clk_tree | grep -i osc
osc 1 38400000 13 0
osc_div 1 38400000 7 0

Does this mean my system has osc?

We use spi@c260000. Need I config pinmux? Is the default pinmux of dev-kit OK?

Did you modify anything for the device tree or kernel Image get this error message?

In devicetree I added1105q which use SPI2 as master SPI:
spi@c260000 {
… …
sja1105q@0 {
compatible = “nxp,sja1105q-switch”;
reg = <0x0>;
status = “okay”;
spi-max-frequency = <0xb71b00>;
devname = “sja1105q-spi”;
switch_model = “sja1105q”;

In kernel code, I add a new file that use “module_spi_driver(sja1105q_spi_driver)” to be registered as spi device.

In device tree, I found imx204 device is also under spi@c260000. So I think spi2 pinmux is configured already by default. I have not configured pinmux. Am I right?

Does this message impact the functionality?
It’s could be harmless error message.

Now spi2 signal can be measured on oscilloscope. In addition, I need to configure gpio, is there any document about hoe to config GPIO?

Have a reference to below link.

I use Jetson_AGX_Series_DevKit_Pinmux_Configuration_Template.xlsm to generate three dtsi file:

and then put them under the folder Linux_for_Tegra/kernel/pinmux/t19x.
And run example python command from README file.
Many errors occured. The following picture is the screenshot of errors.

Does the same error if you don’t modify the Jetson_AGX_Series_DevKit_Pinmux_Configuration_Template.xlsm?

yes, I did not modify the file
Jetson_AGX_Series_DevKit_Pinmux_Configuration_Template.xlsm. Only generate it.

The JetPack version is the latest version 4.4.1 that I installed last night.
Jetson_AGX_Series_DevKit_Pinmux_Configuration_Template.xlsm is downloaded from NVIDIA website yestoday.

Please download the new xlsm file to check again.


This xlsm
is the same as the one that I used. Put the three new generated dtsi files in the t19x folder and run python command, the same errors occurs.

Hi ycl,

The “–mandatory_pinmux_file MANDATORY_PINMUX_FILE_NAME is optional pinmux values info file”, so you can remove this option and run again.

$ python pinmux-dts2cfg.py --pinmux addr_info.txt gpio_addr_info.txt por_val.txt tegra186-quill-p3310-1000-a00-pinmux.dtsi tegra186-quill-p3310-1000-a00-gpio-default.dtsi 1.0 > tegra186-quill-p3310-1000-a00-pinmux-gpio.cfg

After gpio.cgf and padvoltage were generated, where should I pu them? How to use these twe cfg files?

After gpio.cgf and padvoltage were generated, where should I put them? How to use these two cfg files?

Hi ycl,

After generated two cfg files, put them into below path:

Path: /Linux_for_Tegra/bootloader/t186ref/BCT

Please remember to rename the correct cfg name and flash.