We are using SLB9670
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Hi,
If the SPI device device needs CS pin to be set to cs-gpios, please apply the patch and give it a try:
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index 26aa7cb29cbc..20c9799ba448 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -1517,10 +1517,22 @@ static int tegra_spi_transfer_one_message(struct spi_controller *ctrl,
tegra_spi_transfer_delay(xfer->delay_usecs);
}
} else if (xfer->cs_change) {
+ /* CS should de-asserted
+ * at the end of current transfer
+ */
if (cstate && cstate->cs_gpio_valid)
gpio_set_value(spi->cs_gpio, gval);
- tegra_spi_writel(tspi, cmd1, SPI_COMMAND1);
+ if (!tspi->is_hw_based_cs) {
+ u32 cmd1_ncs = (cmd1 & SPI_CS_SW_VAL)
+ ? cmd1 & ~SPI_CS_SW_VAL
+ : cmd1 | SPI_CS_SW_VAL;
+ tegra_spi_writel(tspi, cmd1_ncs, SPI_COMMAND1);
+ }
tegra_spi_transfer_delay(xfer->delay_usecs);
+ /* CS should asserted again for the next transfer */
+ tegra_spi_writel(tspi, cmd1, SPI_COMMAND1);
+ if (cstate && cstate->cs_gpio_valid)
+ gpio_set_value(spi->cs_gpio, !gval);
}
}
@@ -1863,7 +1875,6 @@ static int tegra_spi_probe(struct platform_device *pdev)
tspi = spi_controller_get_devdata(ctrl);
/* the spi->mode bits understood by this driver: */
- ctrl->use_gpio_descriptors = true;
ctrl->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST |
SPI_TX_DUAL | SPI_RX_DUAL | SPI_3WIRE;
ctrl->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
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