SPI1 CS0 experience negative pulse during soft reboot

Hi,

I am facing an issue on SPI1 CS0. It should stay high (inactive) across soft reboot (using reboot command).
But something is driving it low during soft reboot, then it go back to high.
Based on my test using an oscilloscope, I am sure this is NOT caused by kernel when boot up.
SPI1_CS0 is driven low by the following possible places:

  1. pre-bootloader: MB1, or MB2
  2. cboot: I read through cboot code, I don’t see any place that can cause CS0 driven low. So probably not caused by cboot.
  3. the end of reboot step performed by kernel: at the end of reboot, kernel calls arm_pm_restart which will call psci_sys_reset function. I don’t know exactly what this function is doing to reset the chip. It seems it sends an ARM SCPI message to firmware in order to reset the chip.

I also tried modified pinmux BCT .cfg file to add an internal PULL UP on SPI1 CS0:
pinmux.0x0243d010 = 0x00000408; (instead of 0x00000400)
But it didn’t help.

How can I resolve this issue?

Regards,
Shuo

Does press the reset button to reset got the same symptom?

Yes, press reset button to reset got the same symptom.
So, more likely SPI1_CS0 is driven low by mb1, mb2, or cboot? Most likely by mb1 or mb2.

Regards,
Shuo

I found that if I set SPI1_CS0 to be in GPIO output and drive 1 mode (in pinmux mb1 cfg file). It stays high across reboot.
But if I set it in SPI mode, it is driven low when MB1 set it to SPI mode, and it stays low until kernel starts up. I am not sure exactly when SPI1_CS0 is driven back to high by kernel, maybe when tegra-spi driver starts up.

My guest is that if I set SPI1_CS0 in SPI mode, it stays low, until tegra-spi driver configures it and drives it high.

Is there a way to let tegra-spi driver to use GPIO CS?

Regards,
Shuo

You can try add something like below to use GPIO as cs.

cs-gpios = <&gpio TEGRA_GPIO(C, 3) GPIO_ACTIVE_LOW>;