I know the TRM hasn’t been released yet so maybe that will give more information.
But after much headache I discovered that it looks like the SPI1_CS1 pin E13 has been removed and only the SPI1_CS0 pin is available on that bus. :/
I see this noted in “NVIDIA Jetson TX2 OEM Product Design Guide”.
I’m bringing up concern because this is not noted anywhere in the “NVIDIA Jetson TX1 and Jetson TX2 Interface Comparison and Migration” document my team and I have been using to ensure compatibility on our new carrier card.
Can Nvidia chime in as to why this pin was switched to RSVD?