You are right!!!
why the pinmux didn’t work???
I just only modify the cfg file.
What did I lose something???
Am I building kernel wrong???
You are right!!!
why the pinmux didn’t work???
I just only modify the cfg file.
What did I lose something???
Am I building kernel wrong???
Hi ShaneCCC,
I want to say sorry. This is my bad.
I modify the cfg file that in the sources/hardware/XXXXX folder.
It’s not in the bootloader folder.
So, I modify the cfg file in bootloader, then it works!!!
Thank you!!!
If I use xavier as a slave device ,how to I change these values?
@dingjie
Modify the cfg file at …/Linux_for_tegra/bootloader/t186ref/BCT/tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg
And reflash the device by below command
sudo ./flash.sh -r jetson-xavier mmcblk0p1
If I used xavier as a spi master device,It’s useful.
but If I used xavier as a spi slave device, It doesn’t work.
I have two xavier for test.One is the master mode and the other is the slave mode.
I changed the tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg,And reflashed the device.
But slave device can’t work.So I want to know if the above value is applicable to slave mode device。
Thanks
Have a reference to below.
I have try the cmd in my slave xavier follow this ,It’s no use.
sudo devmem2 0x0243d040 w 0x00000445;
sudo devmem2 0x0243d020 w 0x00000445;
sudo devmem2 0x0243d058 w 0x00000445;
sudo devmem2 0x0243d010 w 0x00000449;
In addition, I also tried setting one of the values to 449 and the other three to 445. I tried 4 times and it was useless.
could you tell me what means about these values ? how to I know,what value should I use.
Thanks
Have a tr y to set the TRISTATE=1
0x000000000243d040: PADCTL_UART_SPI1_SCK_0 = 0x00000454 //
E_SCHMT = 0x00000000 // [12:12] DISABLE [DISABLE=0,ENABLE=1]
GPIO_SF_SEL = 0x00000001 // [10:10] SFIO [GPIO=0,SFIO=1]
E_LPDR = 0x00000000 // [08:08] DISABLE [DISABLE=0,ENABLE=1]
E_INPUT = 0x00000001 // [06:06] ENABLE [DISABLE=0,ENABLE=1]
TRISTATE = 0x00000001 // [04:04] TRISTATE [PASSTHROUGH=0,TRISTATE=1]
PUPD = 0x00000001 // [03:02] PULL_DOWN
[NONE=0,PULL_DOWN=1,PULL_UP=2,RSVD=3]
PM = 0x00000000 // [01:00] SPI1 [RSVD1=1,RSVD2=2,RSVD3=3,SPI1=0]
I tested this value and other possible values.It didn’t work too.
Once I run spidev_test on slave ,It enters the waiting state, even if I run spidev on the master, slave’s spidev_test still waiting. But I can measure the waveform on the connection line.
Could you provide me some other testing ideas?
@ShaneCCC
I measured the clock and chip select signal on the connection line.
However, the slave device is always in a waiting state, and no data is sent out on the MISO.
How do you test the slave mode. Did you try the loopback mode?
@ShaneCCC
Use two xaviers, one for master and the other for slave
This is the master’s dts.
spi0: spi@3210000 {
compatible = “nvidia,tegra186-spi”;
reg = <0x0 0x03210000 0x0 0x10000>;
interrupts = <0 36 0x04>;
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu TEGRA_SID_GPCDMA_0>;
dma-coherent;
dmas = <&gpcdma 15>, <&gpcdma 15>;
dma-names = “rx”, “tx”;
nvidia,dma-request-selector = <&gpcdma 15>;
spi-max-frequency = <65000000>;
nvidia,clk-parents = “pll_p”, “clk_m”;
clocks = <&bpmp_clks TEGRA194_CLK_SPI1>,
<&bpmp_clks TEGRA194_CLK_PLLP_OUT0>,
<&bpmp_clks TEGRA194_CLK_CLK_M>;
clock-names = “spi”, “pll_p”, “clk_m”;
resets = <&bpmp_resets TEGRA194_RESET_SPI1>;
reset-names = “spi”;
status = “okay”;
nvidia,clock-always-on;
spi@0 {
compatible = “spidev”;
reg = <0>;
spi-max-frequency = <65000000>;
status = “okay”;
};
};
This is the dts of the slave.
spi0: spi@3210000 {
compatible = “nvidia,tegra124-spi-slave”;
reg = <0x0 0x03210000 0x0 0x10000>;
interrupts = <0 36 0x04>;
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu TEGRA_SID_GPCDMA_0>;
dma-coherent;
dmas = <&gpcdma 15>, <&gpcdma 15>;
dma-names = “rx”, “tx”;
nvidia,dma-request-selector = <&gpcdma 15>;
spi-max-frequency = <65000000>;
nvidia,clk-parents = “pll_p”, “clk_m”;
clocks = <&bpmp_clks TEGRA194_CLK_SPI1>,
<&bpmp_clks TEGRA194_CLK_PLLP_OUT0>,
<&bpmp_clks TEGRA194_CLK_CLK_M>;
clock-names = “spi”, “pll_p”, “clk_m”;
resets = <&bpmp_resets TEGRA194_RESET_SPI1>;
reset-names = “spi”;
status = “okay”;
nvidia,clock-always-on;
spi@0 {
compatible = “spidev”;
reg = <0>;
spi-max-frequency = <65000000>;
nvidia,slave-ready-gpio=<&tegra_main_gpio TEGRA194_MAIN_GPIO(T, 3) 0>;
nvidia,enable-hw-based-cs;
status = “okay”;
};
};
@ShaneCCC
I just tested loopback (connecting MISO and MOSI), the effect is the same, the slave stays waiting. When I type ctrl + C the kernel prints:
[130.276624] spi-tegra124-slave 3210000.spi: waiting for master was interrupted
[130.276934] spi_master spi0: failed to transfer one message from queue
I can’t measure any waveform on MISO.
Remove below to try.
nvidia,slave-ready-gpio=<&tegra_main_gpio TEGRA194_MAIN_GPIO(T, 3) 0>;
I have try it. No use.the effect is the same.
If we are using SPI interface we can communicate in the following ways:
Hello everyone, I have configured my Jetson Xavier pinmux file as in topics but I got only /dev/spidev0.0 but don’t see /dev/spidev0.1 for second chip select what should I do to see it?
@ShaneCCC
I have tried method 1 and method 3 , and the phenomenon is that spide_test is blocked in the transfer() function.
Have you ever tested spi slave mode on xavier spi1?
so for non8gb xavier I should decompile kernel/dtb/tegra194-p2888-0006-p2822-0000.dtb
and add spi@1 like this
spi@3210000 {
compatible = "nvidia,tegra186-spi";
reg = <0x0 0x3210000 0x0 0x10000>;
interrupts = <0x0 0x24 0x4>;
#address-cells = <0x1>;
#size-cells = <0x0>;
iommus = <0x2 0x20>;
dma-coherent;
dmas = <0x1e 0xf 0x1e 0xf>;
dma-names = "rx", "tx";
spi-max-frequency = <0x3dfd240>;
nvidia,clk-parents = "pll_p", "clk_m";
clocks = <0x4 0x87 0x4 0x66 0x4 0xe>;
clock-names = "spi", "pll_p", "clk_m";
resets = <0x5 0x5b>;
reset-names = "spi";
status = "okay";
linux,phandle = <0x162>;
phandle = <0x162>;
spi@0 {
compatible = "spidev";
reg = <0x0>;
spi-max-frequency = <0x1f78a40>;
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x11>;
};
spi@1 {
compatible = “spidev”;
reg = <1>;
status = “okay”;
}
after that build to dtb put in to kernel/dtb and flash?