SPI1 not work on Xavier

Yes, it’s spi0 = “/spi@3210000”
Did you use spidev_test?

yes, but i used the Logical Analysis to detect signal, it don’t work.

the 4-wire always low status.

By the way, the .config just need set the CONFIG_SPI_SPIDEV to y, right??

Hi ShaneCCC,

Did you get my question???

Please modify the pinmux for spi1 like spi2 does. file name: tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg

SPI1
pinmux.0x0243d040 = 0x00000055; # spi1_sck_pz3: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d020 = 0x00000055; # spi1_miso_pz4: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d058 = 0x00000055; # spi1_mosi_pz5: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d010 = 0x00000059; # spi1_cs0_pz6: rsvd1, pull-up, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d050 = 0x00000059; # spi1_cs1_pz7: rsvd1, pull-up, tristate-enable, input-enable, lpdr-disable

SPI2
pinmux.0x0c302048 = 0x00000400; # spi2_sck_pcc0: spi2, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c302050 = 0x00000450; # spi2_miso_pcc1: spi2, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c302028 = 0x00000400; # spi2_mosi_pcc2: spi2, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c302038 = 0x00000400; # spi2_cs0_pcc3: spi2, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable

But the pinmux(SPI1) value is that you say.

I even don’t modify it.

I mean modify the SPI1 like SPI2.

pinmux.0x0243d040 = 0x00000400; # spi1_sck_pz3: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d020 = 0x00000450; # spi1_miso_pz4: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d058 = 0x00000400; # spi1_mosi_pz5: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d010 = 0x00000400; # spi1_cs0_pz6: rsvd1, pull-up, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d050 = 0x00000400; # spi1_cs1_pz7: rsvd1, pull-up, tristate-enable, input-enable, lpdr-disable

Hi ShaneCCC,

I modified it.

I connect the spi1_mosi and spi1_miso, and run the “spidev_test”.

The result still no data on RX.

How could I do anything to figure it out the root cause?

Thank you.

Could you read those reg by devmem2 to confirm the reg is set correct.

You are right!!!

why the pinmux didn’t work???

I just only modify the cfg file.

What did I lose something???

Am I building kernel wrong???

Hi ShaneCCC,

I want to say sorry. This is my bad.

I modify the cfg file that in the sources/hardware/XXXXX folder.

It’s not in the bootloader folder.

So, I modify the cfg file in bootloader, then it works!!!

Thank you!!!

If I use xavier as a slave device ,how to I change these values?

@dingjie
Modify the cfg file at …/Linux_for_tegra/bootloader/t186ref/BCT/tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg

And reflash the device by below command
sudo ./flash.sh -r jetson-xavier mmcblk0p1

If I used xavier as a spi master device,It’s useful.
but If I used xavier as a spi slave device, It doesn’t work.
I have two xavier for test.One is the master mode and the other is the slave mode.
I changed the tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg,And reflashed the device.
But slave device can’t work.So I want to know if the above value is applicable to slave mode device。

Thanks

Have a reference to below.

I have try the cmd in my slave xavier follow this ,It’s no use.
sudo devmem2 0x0243d040 w 0x00000445;
sudo devmem2 0x0243d020 w 0x00000445;
sudo devmem2 0x0243d058 w 0x00000445;
sudo devmem2 0x0243d010 w 0x00000449;

In addition, I also tried setting one of the values to 449 and the other three to 445. I tried 4 times and it was useless.

could you tell me what means about these values ? how to I know,what value should I use.

Thanks

Have a tr y to set the TRISTATE=1
0x000000000243d040: PADCTL_UART_SPI1_SCK_0 = 0x00000454 //
E_SCHMT = 0x00000000 // [12:12] DISABLE [DISABLE=0,ENABLE=1]
GPIO_SF_SEL = 0x00000001 // [10:10] SFIO [GPIO=0,SFIO=1]
E_LPDR = 0x00000000 // [08:08] DISABLE [DISABLE=0,ENABLE=1]
E_INPUT = 0x00000001 // [06:06] ENABLE [DISABLE=0,ENABLE=1]
TRISTATE = 0x00000001 // [04:04] TRISTATE [PASSTHROUGH=0,TRISTATE=1]
PUPD = 0x00000001 // [03:02] PULL_DOWN
[NONE=0,PULL_DOWN=1,PULL_UP=2,RSVD=3]
PM = 0x00000000 // [01:00] SPI1 [RSVD1=1,RSVD2=2,RSVD3=3,SPI1=0]

I tested this value and other possible values.It didn’t work too.
Once I run spidev_test on slave ,It enters the waiting state, even if I run spidev on the master, slave’s spidev_test still waiting. But I can measure the waveform on the connection line.
Could you provide me some other testing ideas?

@ShaneCCC
I measured the clock and chip select signal on the connection line.
However, the slave device is always in a waiting state, and no data is sent out on the MISO.

How do you test the slave mode. Did you try the loopback mode?

@ShaneCCC
Use two xaviers, one for master and the other for slave
This is the master’s dts.
spi0: spi@3210000 {
compatible = “nvidia,tegra186-spi”;
reg = <0x0 0x03210000 0x0 0x10000>;
interrupts = <0 36 0x04>;
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu TEGRA_SID_GPCDMA_0>;
dma-coherent;
dmas = <&gpcdma 15>, <&gpcdma 15>;
dma-names = “rx”, “tx”;
nvidia,dma-request-selector = <&gpcdma 15>;
spi-max-frequency = <65000000>;
nvidia,clk-parents = “pll_p”, “clk_m”;
clocks = <&bpmp_clks TEGRA194_CLK_SPI1>,
<&bpmp_clks TEGRA194_CLK_PLLP_OUT0>,
<&bpmp_clks TEGRA194_CLK_CLK_M>;
clock-names = “spi”, “pll_p”, “clk_m”;
resets = <&bpmp_resets TEGRA194_RESET_SPI1>;
reset-names = “spi”;
status = “okay”;
nvidia,clock-always-on;
spi@0 {
compatible = “spidev”;
reg = <0>;
spi-max-frequency = <65000000>;
status = “okay”;
};

    };

This is the dts of the slave.
spi0: spi@3210000 {
compatible = “nvidia,tegra124-spi-slave”;
reg = <0x0 0x03210000 0x0 0x10000>;
interrupts = <0 36 0x04>;
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu TEGRA_SID_GPCDMA_0>;
dma-coherent;
dmas = <&gpcdma 15>, <&gpcdma 15>;
dma-names = “rx”, “tx”;
nvidia,dma-request-selector = <&gpcdma 15>;
spi-max-frequency = <65000000>;
nvidia,clk-parents = “pll_p”, “clk_m”;
clocks = <&bpmp_clks TEGRA194_CLK_SPI1>,
<&bpmp_clks TEGRA194_CLK_PLLP_OUT0>,
<&bpmp_clks TEGRA194_CLK_CLK_M>;
clock-names = “spi”, “pll_p”, “clk_m”;
resets = <&bpmp_resets TEGRA194_RESET_SPI1>;
reset-names = “spi”;
status = “okay”;
nvidia,clock-always-on;
spi@0 {
compatible = “spidev”;
reg = <0>;
spi-max-frequency = <65000000>;
nvidia,slave-ready-gpio=<&tegra_main_gpio TEGRA194_MAIN_GPIO(T, 3) 0>;
nvidia,enable-hw-based-cs;
status = “okay”;
};

    };