SPI1 not work on Xavier

@ShaneCCC
Use two xaviers, one for master and the other for slave
This is the master’s dts.
spi0: spi@3210000 {
compatible = “nvidia,tegra186-spi”;
reg = <0x0 0x03210000 0x0 0x10000>;
interrupts = <0 36 0x04>;
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu TEGRA_SID_GPCDMA_0>;
dma-coherent;
dmas = <&gpcdma 15>, <&gpcdma 15>;
dma-names = “rx”, “tx”;
nvidia,dma-request-selector = <&gpcdma 15>;
spi-max-frequency = <65000000>;
nvidia,clk-parents = “pll_p”, “clk_m”;
clocks = <&bpmp_clks TEGRA194_CLK_SPI1>,
<&bpmp_clks TEGRA194_CLK_PLLP_OUT0>,
<&bpmp_clks TEGRA194_CLK_CLK_M>;
clock-names = “spi”, “pll_p”, “clk_m”;
resets = <&bpmp_resets TEGRA194_RESET_SPI1>;
reset-names = “spi”;
status = “okay”;
nvidia,clock-always-on;
spi@0 {
compatible = “spidev”;
reg = <0>;
spi-max-frequency = <65000000>;
status = “okay”;
};

    };

This is the dts of the slave.
spi0: spi@3210000 {
compatible = “nvidia,tegra124-spi-slave”;
reg = <0x0 0x03210000 0x0 0x10000>;
interrupts = <0 36 0x04>;
#address-cells = <1>;
#size-cells = <0>;
iommus = <&smmu TEGRA_SID_GPCDMA_0>;
dma-coherent;
dmas = <&gpcdma 15>, <&gpcdma 15>;
dma-names = “rx”, “tx”;
nvidia,dma-request-selector = <&gpcdma 15>;
spi-max-frequency = <65000000>;
nvidia,clk-parents = “pll_p”, “clk_m”;
clocks = <&bpmp_clks TEGRA194_CLK_SPI1>,
<&bpmp_clks TEGRA194_CLK_PLLP_OUT0>,
<&bpmp_clks TEGRA194_CLK_CLK_M>;
clock-names = “spi”, “pll_p”, “clk_m”;
resets = <&bpmp_resets TEGRA194_RESET_SPI1>;
reset-names = “spi”;
status = “okay”;
nvidia,clock-always-on;
spi@0 {
compatible = “spidev”;
reg = <0>;
spi-max-frequency = <65000000>;
nvidia,slave-ready-gpio=<&tegra_main_gpio TEGRA194_MAIN_GPIO(T, 3) 0>;
nvidia,enable-hw-based-cs;
status = “okay”;
};

    };

@ShaneCCC
I just tested loopback (connecting MISO and MOSI), the effect is the same, the slave stays waiting. When I type ctrl + C the kernel prints:
[130.276624] spi-tegra124-slave 3210000.spi: waiting for master was interrupted
[130.276934] spi_master spi0: failed to transfer one message from queue
I can’t measure any waveform on MISO.

Remove below to try.

nvidia,slave-ready-gpio=<&tegra_main_gpio TEGRA194_MAIN_GPIO(T, 3) 0>;

I have try it. No use.the effect is the same.

If we are using SPI interface we can communicate in the following ways:

  1. Loopback MISO and MOSI on a single controller.
  2. To communicate with 2 controllers on same Xavier we need to connect all 4 lines. i.e MISO, MOSI CLK and CS.
  3. To communicate between different Xavier devices we need to connect all 4 lines i.e MISO, MOSI CLK and CS .
    Note: MISO and MOSI connection works in case of single controller

Hello everyone, I have configured my Jetson Xavier pinmux file as in topics but I got only /dev/spidev0.0 but don’t see /dev/spidev0.1 for second chip select what should I do to see it?

@ShaneCCC
I have tried method 1 and method 3 , and the phenomenon is that spide_test is blocked in the transfer() function.
Have you ever tested spi slave mode on xavier spi1?

@fat32nov

Add this node under spi0
spi@1 {
compatible = “spidev”;
reg = <1>;

status = “okay”;
};

so for non8gb xavier I should decompile kernel/dtb/tegra194-p2888-0006-p2822-0000.dtb

and add spi@1 like this

spi@3210000 {
		compatible = "nvidia,tegra186-spi";
		reg = <0x0 0x3210000 0x0 0x10000>;
		interrupts = <0x0 0x24 0x4>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		iommus = <0x2 0x20>;
		dma-coherent;
		dmas = <0x1e 0xf 0x1e 0xf>;
		dma-names = "rx", "tx";
		spi-max-frequency = <0x3dfd240>;
		nvidia,clk-parents = "pll_p", "clk_m";
		clocks = <0x4 0x87 0x4 0x66 0x4 0xe>;
		clock-names = "spi", "pll_p", "clk_m";
		resets = <0x5 0x5b>;
		reset-names = "spi";
		status = "okay";
		linux,phandle = <0x162>;
		phandle = <0x162>;

		spi@0 {
			compatible = "spidev";
			reg = <0x0>;
			spi-max-frequency = <0x1f78a40>;
			nvidia,enable-hw-based-cs;
			nvidia,rx-clk-tap-delay = <0x11>;
		};

		spi@1 {
			compatible = “spidev”;
			reg = <1>;
			status = “okay”;
		}

after that build to dtb put in to kernel/dtb and flash?

yes ,You can try it .

@ShaneCCC
I found that when running spidev_test on the slave, although the program got blocked, I was able to measure the waveform on SCK / MOSI / CS. Very strange, how can the slave mode send out the clock and chip select? The driver is obviously the loaded spi-tegra124-slave.

Could you provide the scope shots for the clk and CS behavior? And read those REG to make sure it been set as expect.

pinmux.0x0243d040 = 0x00000400; # spi1_sck_pz3: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d020 = 0x00000450; # spi1_miso_pz4: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d058 = 0x00000400; # spi1_mosi_pz5: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d010 = 0x00000400; # spi1_cs0_pz6: rsvd1, pull-up, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d050 = 0x00000400; # spi1_cs1_pz7: rsvd1, pull-up, tristate-enable, input-enable, lpdr-disable

pic0
This is the REG vlsues I readed.


This is the waveform I measured.The one on the left is generated by the slave, the one on the right is generated by the master.

The following is the result of zooming in on the left.(slave)

Zoom again

The following is the result of zooming in on the right.(master)

Zoom again

Please try below value.
pinmux.0x0243d040 = 0x00000450; # spi1_sck_pz3: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d020 = 0x00000450; # spi1_miso_pz4: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d058 = 0x00000450; # spi1_miso_pz4: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d010 = 0x00000448; # spi1_cs0_pz6: rsvd1, pull-up, tristate-disable, input-enable, lpdr-disable
pinmux.0x0243d010 = 0x00000448; # spi1_cs0_pz6: rsvd1, pull-up, tristate-disable, input-enable, lpdr-disable

Correct this addr as below as slave mode.

pinmux.0x0243d050 = 0x00000448

The slave only CS has waveform

Hi dingjie have you tried setting the below pinmux settings for slave or for master?
pinmux.0x0243d040 = 0x00000450; # spi1_sck_pz3: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d020 = 0x00000450; # spi1_miso_pz4: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d058 = 0x00000450; # spi1_miso_pz4: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d010 = 0x00000448; # spi1_cs0_pz6: rsvd1, pull-up, tristate-disable, input-enable, lpdr-disable
pinmux.0x0243d050 = 0x00000448; # spi1_cs0_pz6: rsvd1, pull-up, tristate-disable, input-enable, lpdr-disable

@ShaneCCC
Hello , I have configured my Jetson Xavier pinmux file as in topics and I got /dev/spidev0.0 but I use spidev_test to send data, but the oscilloscope does not show any data. Maybe no data is sent out on the MISO.
What should I do?

Oh, by the way, I use Jetson 4.3. I wonder if it’s different from the previous one?

@darius-yuan
Did you programing below REG?

SPI1
pinmux.0x0243d040 = 0x00000055; # spi1_sck_pz3: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d020 = 0x00000055; # spi1_miso_pz4: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d058 = 0x00000055; # spi1_mosi_pz5: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d010 = 0x00000059; # spi1_cs0_pz6: rsvd1, pull-up, tristate-enable, input-enable, lpdr-disable
pinmux.0x0243d050 = 0x00000059; # spi1_cs1_pz7: rsvd1, pull-up, tristate-enable, input-enable, lpdr-disable

SPI2
pinmux.0x0c302048 = 0x00000400; # spi2_sck_pcc0: spi2, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c302050 = 0x00000450; # spi2_miso_pcc1: spi2, tristate-enable, input-enable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c302028 = 0x00000400; # spi2_mosi_pcc2: spi2, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable
pinmux.0x0c302038 = 0x00000400; # spi2_cs0_pcc3: spi2, tristate-disable, input-disable, io_high_voltage-disable, lpdr-disable