my platform is jetson-agx-xavier
I run
./flash.sh -r -k kernel-dtb jetson-xavier mmcblk0p1
show
“copying pinmux_config(Linux_for_Tegra/bootloader/t186ref/BCT/tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg)… done.”
Can’t I change the settings directly on dts??
Why do I need to change this configuration file?
spit@user-desktop:/home/user# cat /sys/kernel/debug/tegra_pinctrl_reg | grep -i s
Bank: 1 Reg: 0x0c302028 Val: 0x00000444 → spi2_mosi_pcc2
Bank: 1 Reg: 0x0c302038 Val: 0x00000448 → spi2_cs0_pcc3
Bank: 1 Reg: 0x0c302048 Val: 0x00000444 → spi2_sck_pcc0
Bank: 1 Reg: 0x0c302050 Val: 0x00000444 → spi2_miso_pcc1
Bank: 0 Reg: 0x0243b000 Val: 0x00023440 → qspi0_io3_pc5
Bank: 0 Reg: 0x0243b008 Val: 0x00023440 → qspi0_io2_pc4
Bank: 0 Reg: 0x0243b010 Val: 0x00023440 → qspi0_io1_pc3
Bank: 0 Reg: 0x0243b018 Val: 0x00023440 → qspi0_io0_pc2
Bank: 0 Reg: 0x0243b020 Val: 0x00023460 → qspi0_sck_pc0
Bank: 0 Reg: 0x0243b028 Val: 0x00023400 → qspi0_cs_n_pc1
Bank: 0 Reg: 0x0243b030 Val: 0x00023440 → qspi1_io3_pd3
Bank: 0 Reg: 0x0243b038 Val: 0x00023440 → qspi1_io2_pd2
Bank: 0 Reg: 0x0243b040 Val: 0x00023440 → qspi1_io1_pd1
Bank: 0 Reg: 0x0243b048 Val: 0x00023440 → qspi1_io0_pd0
Bank: 0 Reg: 0x0243b050 Val: 0x00023460 → qspi1_sck_pc6
Bank: 0 Reg: 0x0243b058 Val: 0x00023400 → qspi1_cs_n_pc7
Bank: 0 Reg: 0x0243b060 Val: 0x00002000 → qspi_comp
Bank: 0 Reg: 0x0243d008 Val: 0x00000444 → spi3_miso_py1
Bank: 0 Reg: 0x0243d010 Val: 0x00000448 → spi1_cs0_pz6
Bank: 0 Reg: 0x0243d018 Val: 0x00000448 → spi3_cs0_py3
Bank: 0 Reg: 0x0243d020 Val: 0x00000444 → spi1_miso_pz4
Bank: 0 Reg: 0x0243d028 Val: 0x00000448 → spi3_cs1_py4
Bank: 0 Reg: 0x0243d040 Val: 0x00000444 → spi1_sck_pz3
Bank: 0 Reg: 0x0243d048 Val: 0x00000054 → spi3_sck_py0
Bank: 0 Reg: 0x0243d050 Val: 0x00000448 → spi1_cs1_pz7
Bank: 0 Reg: 0x0243d058 Val: 0x00000444 → spi1_mosi_pz5
Bank: 0 Reg: 0x0243d060 Val: 0x00000444 → spi3_mosi_py2
I still can’t modify this register
Bank: 0 Reg: 0x0243d048 Val: 0x00000054 → spi3_sck_py0
tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg (30.5 KB)
tegra194-p2888-0001-p2822-0000.dts (368.6 KB)
Could you flash by remove -k kernel-dtb
./flash.sh -r -k kernel-dtb jetson-xavier mmcblk0p1
I use the same instruction but it seems to have no effect
flash_kdtb.log (982.3 KB)
Use this command instead, but spi3_sck_py0 does not change
Bank: 0 Reg: 0x0243d048 Val: 0x00000054 → spi3_sck_py0
./flash.sh jetson-xavier mmcblk0p1
The REG should be 0x00000059 without any cfg modification.
Bank: 0 Reg: 0x0243d048 Val: 0x00000059 → spi3_sck_py0
Did you have any device tree customized? Could you try original dtb.
Use EVB board to test
Have the same problem
spit@user-desktop:/home/user# cat /sys/kernel/debug/tegra_pinctrl_reg | grep -i s
Bank: 1 Reg: 0x0c302028 Val: 0x00000444 → spi2_mosi_pcc2
Bank: 1 Reg: 0x0c302038 Val: 0x00000448 → spi2_cs0_pcc3
Bank: 1 Reg: 0x0c302048 Val: 0x00000444 → spi2_sck_pcc0
Bank: 1 Reg: 0x0c302050 Val: 0x00000444 → spi2_miso_pcc1
Bank: 0 Reg: 0x0243b000 Val: 0x00023440 → qspi0_io3_pc5
Bank: 0 Reg: 0x0243b008 Val: 0x00023440 → qspi0_io2_pc4
Bank: 0 Reg: 0x0243b010 Val: 0x00023440 → qspi0_io1_pc3
Bank: 0 Reg: 0x0243b018 Val: 0x00023440 → qspi0_io0_pc2
Bank: 0 Reg: 0x0243b020 Val: 0x00023460 → qspi0_sck_pc0
Bank: 0 Reg: 0x0243b028 Val: 0x00023400 → qspi0_cs_n_pc1
Bank: 0 Reg: 0x0243b030 Val: 0x00023440 → qspi1_io3_pd3
Bank: 0 Reg: 0x0243b038 Val: 0x00023440 → qspi1_io2_pd2
Bank: 0 Reg: 0x0243b040 Val: 0x00023440 → qspi1_io1_pd1
Bank: 0 Reg: 0x0243b048 Val: 0x00023440 → qspi1_io0_pd0
Bank: 0 Reg: 0x0243b050 Val: 0x00023460 → qspi1_sck_pc6
Bank: 0 Reg: 0x0243b058 Val: 0x00023400 → qspi1_cs_n_pc7
Bank: 0 Reg: 0x0243b060 Val: 0x00002000 → qspi_comp
Bank: 0 Reg: 0x0243d008 Val: 0x00000444 → spi3_miso_py1
Bank: 0 Reg: 0x0243d010 Val: 0x00000448 → spi1_cs0_pz6
Bank: 0 Reg: 0x0243d018 Val: 0x00000448 → spi3_cs0_py3
Bank: 0 Reg: 0x0243d020 Val: 0x00000444 → spi1_miso_pz4
Bank: 0 Reg: 0x0243d028 Val: 0x00000448 → spi3_cs1_py4
Bank: 0 Reg: 0x0243d040 Val: 0x00000444 → spi1_sck_pz3
Bank: 0 Reg: 0x0243d048 Val: 0x00000054 → spi3_sck_py0
Bank: 0 Reg: 0x0243d050 Val: 0x00000448 → spi1_cs1_pz7
Bank: 0 Reg: 0x0243d058 Val: 0x00000444 → spi1_mosi_pz5
Bank: 0 Reg: 0x0243d060 Val: 0x00000444 → spi3_mosi_py2
tegra194-p2888-0001-p2822-0000.dts (357.7 KB)
tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg (30.5 KB)
Could you configure the Bank: 0 Reg: 0x0243d048 by devmem2 first.
I don’t have device to verify it now.
“Could you configure the Bank: 0 Reg: 0x0243d048 by devmem2 first.”
Any result to share? Still an issue to support?
Due to project schedule issues, this issue has been postponed.