# 使用spi3 連接 flash **URL:** \ **Category:** Jetson AGX Xavier\ **Tags:** kernel\ **Created:** [September 16, 2021, 2:06am UTC](https://forums.developer.nvidia.com/t/spi3-flash/189366 "2021-09-16T02:06:06Z")\ **Posts on this page:** 9\ **Page:** 1
**Author:** ![channinglan](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/channinglan/32/228568_2.png) [@channinglan](https://forums.developer.nvidia.com/u/channinglan)\ **Post date:** [September 16, 2021, 2:06am UTC](https://forums.developer.nvidia.com/t/spi3-flash/189366/1 "2021-09-16T02:06:06Z")
I want to use spi3 to connect to flash ![image](https://global.discourse-cdn.com/nvidia/original/3X/6/f/6f8910ba2bf04ac1332a6eb3d64ecc85c01f01d1.png) I add this setting Doesn’t seem to appear spidev spi@3230000 { status = “okay”; spi@0 { compatible = “tegra-spidev”; reg = \<0x0\>; spi-max-frequency = \<33000000\>; controller-data { nvidia,enable-hw-based-cs; nvidia,rx-clk-tap-delay = \<0x11\>; }; }; How to enable spidev?? I want to be able to access spi flash Which command should I use? ---
**Author:** ![ShaneCCC](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/shaneccc/32/14043_2.png) [@ShaneCCC](https://forums.developer.nvidia.com/u/ShaneCCC)\ **Post date:** [September 16, 2021, 5:56am UTC](https://forums.developer.nvidia.com/t/spi3-flash/189366/3 "2021-09-16T05:56:10Z")
Should flash using qspi interface? You need enable spidev by modprobe devspi ---
**Author:** ![channinglan](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/channinglan/32/228568_2.png) [@channinglan](https://forums.developer.nvidia.com/u/channinglan)\ **Post date:** [September 16, 2021, 6:17am UTC](https://forums.developer.nvidia.com/t/spi3-flash/189366/4 "2021-09-16T06:17:49Z")
I want use spi@3230000 insmod spidev.ko I can see /dev/spidev0.1 /sys/devices/3210000.spi /sys/devices/c260000.spi can’t see about spi@3230000 ---
**Author:** ![ShaneCCC](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/shaneccc/32/14043_2.png) [@ShaneCCC](https://forums.developer.nvidia.com/u/ShaneCCC)\ **Post date:** [September 16, 2021, 6:56am UTC](https://forums.developer.nvidia.com/t/spi3-flash/189366/5 "2021-09-16T06:56:52Z")
spi@3230000 is spi2.x you need enable it by add spidev under spi@3230000 ```auto spi@0 { compatible = "spidev"; reg = <0x0>; spi-max-frequency = <0x2faf080>; controller-data { nvidia,enable-hw-based-cs; nvidia,rx-clk-tap-delay = <0x10>; nvidia,tx-clk-tap-delay = <0x0>; }; }; ``` ---
**Author:** ![channinglan](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/channinglan/32/228568_2.png) [@channinglan](https://forums.developer.nvidia.com/u/channinglan)\ **Post date:** [September 16, 2021, 7:21am UTC](https://forums.developer.nvidia.com/t/spi3-flash/189366/6 "2021-09-16T07:21:56Z")
I can see /dev/spidev2.0 … wait to connect MISO and MOSI …to test spidev\_test root@user-desktop:/home/user# ./spidev\_test -D /dev/spidev2.0 -v spi mode: 0x0 bits per word: 8 max speed: 500000 Hz (500 KHz) TX | FF FF FF FF FF FF 40 00 00 00 00 95 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F0 0D | …@…? RX | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | … ---
**Author:** ![ShaneCCC](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/shaneccc/32/14043_2.png) [@ShaneCCC](https://forums.developer.nvidia.com/u/ShaneCCC)\ **Post date:** [September 16, 2021, 8:15am UTC](https://forums.developer.nvidia.com/t/spi3-flash/189366/7 "2021-09-16T08:15:21Z")
Have a reference to below link to check the cfg file, you may need modify the spi3\_xxx for spi2 function. > [@SPI1 not work on Xavier](https://forums.developer.nvidia.com/t/spi1-not-work-on-xavier/72141/5): > > Please modify the pinmux for spi1 like spi2 does. file name: tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg SPI1 pinmux.0x0243d040 = 0x00000055; # spi1\_sck\_pz3: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable pinmux.0x0243d020 = 0x00000055; # spi1\_miso\_pz4: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable pinmux.0x0243d058 = 0x00000055; # spi1\_mosi\_pz5: rsvd1, pull-down, tristate-enable, input-enable, lpdr-disable pinmux.0x0243d010 = 0x00000059; # spi1\_cs0\_pz6:… ---
**Author:** ![channinglan](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/channinglan/32/228568_2.png) [@channinglan](https://forums.developer.nvidia.com/u/channinglan)\ **Post date:** [September 16, 2021, 8:50am UTC](https://forums.developer.nvidia.com/t/spi3-flash/189366/8 "2021-09-16T08:50:03Z")
Can’t use SPI3? pinmux.0x0243d008 = 0x00000001; # spi3\_miso\_py1: rsvd1, tristate-disable, input-disable, io\_high\_voltage-disable, lpdr-disable pinmux.0x0243d060 = 0x00000411; # spi3\_mosi\_py2: rsvd1, tristate-enable, input-disable, io\_high\_voltage-disable, lpdr-disable pinmux.0x0243d028 = 0x00000001; # spi3\_cs1\_py4: rsvd1, tristate-disable, input-disable, io\_high\_voltage-disable, lpdr-disable pinmux.0x0243d048 = 0x00000415; # spi3\_sck\_py0: rsvd1, pull-down, tristate-enable, input-disable, io\_high\_voltage-disable, lpdr-disable pinmux.0x0243d018 = 0x00000415; # spi3\_cs0\_py3: rsvd1, pull-down, tristate-enable, input-disable, io\_high\_voltage-disable, lpdr-disabl ---
**Author:** ![ShaneCCC](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/shaneccc/32/14043_2.png) [@ShaneCCC](https://forums.developer.nvidia.com/u/ShaneCCC)\ **Post date:** [September 16, 2021, 8:54am UTC](https://forums.developer.nvidia.com/t/spi3-flash/189366/9 "2021-09-16T08:54:10Z")
Try to modify it by devmem2 like the reference topic to confirm it. ---
**Author:** ![TomNVIDIA](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/tomnvidia/32/14181_2.png) [@TomNVIDIA](https://forums.developer.nvidia.com/u/TomNVIDIA)\ **Post date:** [October 18, 2021, 6:18pm UTC](https://forums.developer.nvidia.com/t/spi3-flash/189366/11 "2021-10-18T18:18:53Z")