Spidev shows up in devices, but no MOSI or CS activity when attempting to transmit

I’m not entirely sure where to start to describe the issue. I would say I’m new to this, but I kinda know my way around, it’s just that all the different pieces haven’t come together in my head. The issue I’m having is that I got a fresh TX2 NX with the OS unmodified. I was going through some forums and resources to add the spidev driver and then recompile the kernel, along with modifying the device tree. After sometime I looked at the the device tree in the OS that’s already there and it looks like SPI was already there, and the spidev.ko file was already in the drivers folder. So it seems like I should be good to go without having to do anything. What I had to do to get the spidev devices to show up is use modprobe and add spidev to a list to load the spidev.ko driver on boot.

I have spidev0.0, 0.1, 1.0, and 1.1. I wrote a program to write out to SPI and do a loopback test but I get nothing back on any of the spidevs. I also tried to download and use spidev-tools https://github.com/cpb-/spi-tools to manually write out data and print out what I get back and I still get nothing.

I tried looking at the MOSI and CS lines on an oscilloscope and nothing happens, infact, MOSI and CS are always LOW when CS should at least be HIGH. I’m thinking there must be something I’m missing somewhere in the kernel or device tree that could be causing this. I do have a voltage level translator between the TX2 NX and the external connector translating from 1.8v to 3.3v however, I know it works because I also have a UART on that same chip and it’s able to access the terminal through USB to UART adaptor.

Here is what I have for spi in device tree:

spi@7000d400 {
		compatible = "nvidia,tegra210-spi";
		reg = <0x0 0x7000d400 0x0 0x200>;
		interrupts = <0x0 0x3b 0x4>;
		iommus = <0x30 0xe>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		dmas = <0x51 0xf 0x51 0xf>;
		dma-names = "rx", "tx";
		nvidia,clk-parents = "pll_p", "clk_m";
		clocks = <0x26 0x29 0x26 0xf3 0x26 0xe9>;
		clock-names = "spi", "pll_p", "clk_m";
		resets = <0x26 0x29>;
		reset-names = "spi";
		status = "okay";
		linux,phandle = <0xf8>;
		phandle = <0xf8>;

		prod-settings {
			#prod-cells = <0x3>;

			prod {
				prod = <0x4 0xfff 0x0>;
			};

			prod_c_flash {
				status = "disabled";
				prod = <0x4 0x3f 0x7>;
			};

			prod_c_loop {
				status = "disabled";
				prod = <0x4 0xfff 0x44b>;
			};
		};

		spi@0 {
			compatible = "tegra-spidev";
			reg = <0x0>;
			spi-max-frequency = <0x1f78a40>;

			controller-data {
				nvidia,enable-hw-based-cs;
				nvidia,cs-setup-clk-count = <0x1e>;
				nvidia,cs-hold-clk-count = <0x1e>;
				nvidia,rx-clk-tap-delay = <0x7>;
				nvidia,tx-clk-tap-delay = <0x0>;
			};
		};

		spi@1 {
			compatible = "tegra-spidev";
			reg = <0x1>;
			spi-max-frequency = <0x1f78a40>;

			controller-data {
				nvidia,enable-hw-based-cs;
				nvidia,rx-clk-tap-delay = <0x7>;
			};
		};
	};

	spi@7000d600 {
		compatible = "nvidia,tegra210-spi";
		reg = <0x0 0x7000d600 0x0 0x200>;
		interrupts = <0x0 0x52 0x4>;
		iommus = <0x30 0xe>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		dmas = <0x51 0x10 0x51 0x10>;
		dma-names = "rx", "tx";
		nvidia,clk-parents = "pll_p", "clk_m";
		clocks = <0x26 0x2c 0x26 0xf3 0x26 0xe9>;
		clock-names = "spi", "pll_p", "clk_m";
		resets = <0x26 0x2c>;
		reset-names = "spi";
		status = "okay";
		linux,phandle = <0xf9>;
		phandle = <0xf9>;

		prod-settings {
			#prod-cells = <0x3>;

			prod {
				prod = <0x4 0xfff 0x0>;
			};

			prod_c_flash {
				status = "disabled";
				prod = <0x4 0x3f 0x6>;
			};

			prod_c_loop {
				status = "disabled";
				prod = <0x4 0xfff 0x44b>;
			};
		};

		spi@0 {
			compatible = "tegra-spidev";
			reg = <0x0>;
			spi-max-frequency = <0x1f78a40>;

			controller-data {
				nvidia,enable-hw-based-cs;
				nvidia,rx-clk-tap-delay = <0x6>;
			};
		};

		spi@1 {
			compatible = "tegra-spidev";
			reg = <0x1>;
			spi-max-frequency = <0x1f78a40>;

			controller-data {
				nvidia,enable-hw-based-cs;
				nvidia,rx-clk-tap-delay = <0x6>;
			};
		};
	};

	spi@7000d800 {
		compatible = "nvidia,tegra210-spi";
		reg = <0x0 0x7000d800 0x0 0x200>;
		interrupts = <0x0 0x53 0x4>;
		iommus = <0x30 0xe>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		dmas = <0x51 0x11 0x51 0x11>;
		dma-names = "rx", "tx";
		nvidia,clk-parents = "pll_p", "clk_m";
		clocks = <0x26 0x2e 0x26 0xf3 0x26 0xe9>;
		clock-names = "spi", "pll_p", "clk_m";
		resets = <0x26 0x2e>;
		reset-names = "spi";
		status = "okay";
		linux,phandle = <0xfa>;
		phandle = <0xfa>;

		prod-settings {
			#prod-cells = <0x3>;

			prod {
				prod = <0x4 0xfff 0x0>;
			};

			prod_c_flash {
				status = "disabled";
				prod = <0x4 0x3f 0x8>;
			};

			prod_c_loop {
				status = "disabled";
				prod = <0x4 0xfff 0x44b>;
			};
		};
	};

	spi@7000da00 {
		compatible = "nvidia,tegra210-spi";
		reg = <0x0 0x7000da00 0x0 0x200>;
		interrupts = <0x0 0x5d 0x4>;
		iommus = <0x30 0xe>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		dmas = <0x51 0x12 0x51 0x12>;
		dma-names = "rx", "tx";
		nvidia,clk-parents = "pll_p", "clk_m";
		clocks = <0x26 0x44 0x26 0xf3 0x26 0xe9>;
		clock-names = "spi", "pll_p", "clk_m";
		resets = <0x26 0x44>;
		reset-names = "spi";
		status = "okay";
		spi-max-frequency = <0xb71b00>;
		linux,phandle = <0xfb>;
		phandle = <0xfb>;

		prod-settings {
			#prod-cells = <0x3>;

			prod {
				prod = <0x4 0xfff 0x0>;
			};

			prod_c_flash {
				status = "disabled";
				prod = <0x4 0xfff 0x44b>;
			};

			prod_c_cs0 {
				prod = <0x4 0xfc0 0x400>;
			};
		};

Hi luc4,

Are you using the devkit from NVIDIA or custom board for TX2 NX?
and what’s your current Jetpack version in use?

Please refer to the following thread to verify SPI loopback test first.
Jetson Nano SPI Bus Not Working - #10 by KevinFFF
It is from Jetson Nano, but the process should be similar as TX2 NX.

Please also help to provide the flash log and the result of the following command running on your board for further check.

$sudo cat /sys/kernel/debug/tegra_pinctrl_reg | grep -i spi

I’m using a custom board.

Jetpack 4.6.2

Loop back test doesn’t show anything at all. There’s nothing coming from MOSI.

Here’s the log:

Blockquote
Bank: 1 Reg: 0x70003050 Val: 0x0000e015 → spi1_mosi_pc0
Bank: 1 Reg: 0x70003054 Val: 0x0000e015 → spi1_miso_pc1
Bank: 1 Reg: 0x70003058 Val: 0x0000e015 → spi1_sck_pc2
Bank: 1 Reg: 0x7000305c Val: 0x0000e015 → spi1_cs0_pc3
Bank: 1 Reg: 0x70003060 Val: 0x0000e015 → spi1_cs1_pc4
Bank: 1 Reg: 0x70003064 Val: 0x00006016 → spi2_mosi_pb4
Bank: 1 Reg: 0x70003068 Val: 0x00006016 → spi2_miso_pb5
Bank: 1 Reg: 0x7000306c Val: 0x00006016 → spi2_sck_pb6
Bank: 1 Reg: 0x70003070 Val: 0x00006016 → spi2_cs0_pb7
Bank: 1 Reg: 0x70003074 Val: 0x00006015 → spi2_cs1_pdd0
Bank: 1 Reg: 0x70003078 Val: 0x0000e015 → spi4_mosi_pc7
Bank: 1 Reg: 0x7000307c Val: 0x0000e015 → spi4_miso_pd0
Bank: 1 Reg: 0x70003080 Val: 0x0000e015 → spi4_sck_pc5
Bank: 1 Reg: 0x70003084 Val: 0x0000e015 → spi4_cs0_pc6
Bank: 1 Reg: 0x70003088 Val: 0x00002040 → qspi_sck_pee0
Bank: 1 Reg: 0x7000308c Val: 0x00002000 → qspi_cs_n_pee1
Bank: 1 Reg: 0x70003090 Val: 0x00002040 → qspi_io0_pee2
Bank: 1 Reg: 0x70003094 Val: 0x00002040 → qspi_io1_pee3
Bank: 1 Reg: 0x70003098 Val: 0x00002040 → qspi_io2_pee4
Bank: 1 Reg: 0x7000309c Val: 0x00002040 → qspi_io3_pee5
Bank: 0 Reg: 0x70000b70 Val: 0x00000001 → drive_qspi_comp_control
Bank: 0 Reg: 0x70000b78 Val: 0x00000001 → drive_qspi_lpbk_control
Bank: 0 Reg: 0x70000a78 Val: 0x00808000 → drive_qspi_comp

It seems the pinmux configured not correctly for SPI usage.

Which SPI interface you are using for loopback test?

Could you help to provide the flash log of this board for further check?

I’m trying to use SPI0 for an FRAM chip where using, that’s ultimately the one I’m trying to use.

SPI1 is the one I’m trying to do the loopback test on because I have access to that through an external connector, which I used a wire to loop MISO and MOSI. Once I’m sure that works, I was going to use the same c code and device tree mods to get SPI0 working. I don’t have external access to SPI0 to loop back because it’s only wired to the FRAM chip.

I’m referring to SPI0 and SPI1 from the Jetson datasheet, the actual device name may be different because I noticed a difference in naming conventions when it comes to device tree and etc on occasion.

I’m trying to look up on google how to get the flash log, but I only get references to how to access flash memory. Which directory is the flash log located in on the TX2 NX?

Is this what you mean?

/boot$ journalctl -b | grep pwm
Dec 10 05:15:49 worker-node-1 kernel: tegra-pwm 7000a000.pwm: PWM clk cannot sleep in ops
Dec 10 05:15:49 worker-node-1 kernel: tegra-dfll-pwm 70110000.pwm: DFLL pwm-rate: 12800000
Dec 10 05:15:49 worker-node-1 kernel: tegra-dfll-pwm 70110000.pwm: DFLL_PWM regulator is available now
Dec 10 05:15:49 worker-node-1 kernel: pwm-regulator pwm_regulators:pwm-regulator@0: PWM regulator registration passed
Dec 10 05:15:49 worker-node-1 kernel: pwm-regulator pwm_regulators:pwm-regulator@1: PWM regulator registration passed
Dec 10 05:15:49 worker-node-1 kernel: FAN dev name: pwm-fan
Dec 10 05:15:49 worker-node-1 kernel: pwm_fan_driver pwm-fan: cap state:7, cap pwm:255
Dec 10 05:15:49 worker-node-1 kernel: pwm_fan_driver pwm-fan: got pwm for fan. polarity is normal
Dec 10 05:15:49 worker-node-1 kernel: pwm_fan_driver pwm-fan: fan tach request irq success
Dec 10 05:15:49 worker-node-1 kernel: pwm_fan_driver pwm-fan: tach period: 1000
Dec 10 05:15:49 worker-node-1 kernel: pwm_fan_driver pwm-fan: index 0: pwm=0, rpm=0, rru=40, rrd=40, state:2
Dec 10 05:15:49 worker-node-1 kernel: pwm_fan_driver pwm-fan: index 1: pwm=80, rpm=1000, rru=2, rrd=2, state:2
Dec 10 05:15:49 worker-node-1 kernel: pwm_fan_driver pwm-fan: index 2: pwm=120, rpm=2000, rru=1, rrd=1, state:2
Dec 10 05:15:49 worker-node-1 kernel: pwm_fan_driver pwm-fan: index 3: pwm=160, rpm=3000, rru=1, rrd=1, state:2
Dec 10 05:15:49 worker-node-1 kernel: pwm_fan_driver pwm-fan: index 4: pwm=255, rpm=4000, rru=1, rrd=1, state:3
Dec 10 05:15:49 worker-node-1 kernel: pwm_fan_driver pwm-fan: index 5: pwm=255, rpm=5000, rru=1, rrd=1, state:3
Dec 10 05:15:49 worker-node-1 kernel: pwm_fan_driver pwm-fan: index 6: pwm=255, rpm=6000, rru=1, rrd=1, state:3
Dec 10 05:15:49 worker-node-1 kernel: pwm_fan_driver pwm-fan: index 7: pwm=255, rpm=7000, rru=1, rrd=1, state:4
Dec 10 05:15:49 worker-node-1 kernel: pwm_fan_driver pwm-fan: index 8: pwm=255, rpm=10000, rru=1, rrd=1, state:4
Dec 10 05:15:49 worker-node-1 kernel: pwm_fan_driver pwm-fan: index 9: pwm=255, rpm=11000, rru=1, rrd=1, state:4
Apr 26 15:38:54 worker-node-1 jtop[3906]: [INFO] jtop.core.common - fan loaded on /sys/devices/pwm-fan

Yes, please refer to the pinmux table of TX2 to check which SPI interface and related pins you are using.

The flash log is the log when you are flashing the image to the board, it would show on the terminal of your host PC.
I want to check which device tree you are using for your board.

It looks like the pinmux may not be configured correctly. It says that this pinmux file is the default dtb that comes with the system and SPI1, which is SPI2 in the SFIO0 column.

SPI0 is the other port I’m trying to get working which I can’t do a loop back test because it’s connected to an FRAM chip. Looks like the pin are also only set to regular GPIOs.

As for the flash log, I don’t have that as I flashed it a long time ago and we have a bunch of software on there already so I would prefer to not re-flash it. I don’t rememebr the command I used to find this but it pointed to the system using this dtb: kernel_tegra210-p3448-0000-p3449-0000-b00.dtb. I haven’t made any modifications to it. That’s the only dtb in the boot folder on the TX2 NX, the rest are all dtbo. I’m trying to find some other to prove that this is the dtb it is using currently.

The odd thing is that after I got spi to show up in the /dev folder, I had assumed that the pinmux must have been correct because I was under the impression that the device wouldn’t show up if it isn’t configured properly. I may be mistaken.

If I look at dmesg I can see this dts file it’s using if that helps.

Yes, both of your SPI0 and SPI1 are not configured for SPI usage.

Is this custom board designed by you or you just bought them from the vendor?

If you don’t want to reflash the board and correct the pinmux configuration, you could use the following command to modify them.

$sudo busybox devmem <register address> w <value>

I designed it yes. It’s my first attempt so I’m trying to navigate this whole thing. Slowly getting it though.

I’m modifying the spreadsheet and I’m wondering if the pin directions are configured correctly now?

I decided to flash the board and backup the files. Trying to setup a procedure to modify the OS and flash it to the device to streamline things.

Here is the log you requested:

~/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra$ sudo ./flash.sh p3449-0000+p3448-0000-qspi-sd mmcblk0p1
###############################################################################
# L4T BSP Information:
# R32 , REVISION: 7.2
###############################################################################
# Target Board Information:
# Name: p3449-0000+p3448-0000-qspi-sd, Board Family: t210ref, SoC: Tegra 210, 
# OpMode: production, Boot Authentication: , 
# Disk encryption: disabled ,
###############################################################################
./tegraflash.py --chip 0x21 --applet "/home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/nvtboot_recovery.bin" --skipuid --cmd "dump eeprom boardinfo cvm.bin" 
Welcome to Tegra Flash
version 1.0.0
Type ? or help for help and q or quit to exit
Use ! to execute system commands
 
[   0.0015 ] Generating RCM messages
[   0.0035 ] tegrarcm --listrcm rcm_list.xml --chip 0x21 0 --download rcm /home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/nvtboot_recovery.bin 0 0
[   0.0041 ] RCM 0 is saved as rcm_0.rcm
[   0.0045 ] RCM 1 is saved as rcm_1.rcm
[   0.0045 ] List of rcm files are saved in rcm_list.xml
[   0.0045 ] 
[   0.0045 ] Signing RCM messages
[   0.0063 ] tegrasign --key None --list rcm_list.xml --pubkeyhash pub_key.key
[   0.0069 ] Assuming zero filled SBK key
[   0.0106 ] 
[   0.0107 ] Copying signature to RCM mesages
[   0.0125 ] tegrarcm --chip 0x21 0 --updatesig rcm_list_signed.xml
[   0.0135 ] 
[   0.0136 ] Boot Rom communication
[   0.0156 ] tegrarcm --chip 0x21 0 --rcm rcm_list_signed.xml --skipuid
[   0.0164 ] RCM version 0X210001
[   0.1259 ] Boot Rom communication completed
[   1.1341 ] 
[   1.1343 ] dump EEPROM info
[   1.1388 ] tegrarcm --oem platformdetails eeprom /home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/cvm.bin
[   1.1412 ] Applet version 00.01.0000
[   1.1731 ] Saved platform info in /home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/cvm.bin
[   1.2510 ] 
[   1.2556 ] tegrarcm --reboot recovery
[   1.2579 ] Applet version 00.01.0000
[   1.3321 ] 
Board ID(3448) version(400) 
copying bctfile(/home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/t210ref/BCT/P3448_A00_lpddr4_204Mhz_P987.cfg)... done.
copying bootloader(/home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/t210ref/cboot.bin)... done.
copying initrd(/home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/l4t_initrd.img)... done.
Making Boot image... done.
Existing sosfile(/home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/nvtboot_recovery.bin) reused.
copying tegraboot(/home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/t210ref/nvtboot.bin)... done.
copying cpu_bootloader(/home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/t210ref/cboot.bin)... done.
copying bpffile(/home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/t210ref/sc7entry-firmware.bin)... done.
copying wb0boot(/home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/t210ref/warmboot.bin)... done.
Existing tosfile(/home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/tos-mon-only.img) reused.
Existing eksfile(/home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/eks.img) reused.
copying dtbfile(/home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/kernel/dtb/tegra210-p3448-0000-p3449-0000-b00.dtb)... done.
Copying nv_boot_control.conf to rootfs
	populating kernel to rootfs... done.
	populating initrd to rootfs... done.
	populating kernel_tegra210-p3448-0000-p3449-0000-b00.dtb to rootfs... done.
Making system.img... 
	populating rootfs from /home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/rootfs ... 	populating /boot/extlinux/extlinux.conf ... done.
	Sync'ing system.img ... done.
	Converting RAW image to Sparse image... done.
system.img built successfully. 
Existing tbcfile(/home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/nvtboot_cpu.bin) reused.
copying tbcdtbfile(/home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/kernel/dtb/tegra210-p3448-0000-p3449-0000-b00.dtb)... done.
copying cfgfile(/home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/t210ref/cfg/flash_l4t_t210_max-spi_sd_p3448.xml) to flash.xml... done.
copying flasher(/home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/t210ref/cboot.bin)... done.
Existing flashapp(/home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/tegraflash.py) reused.
./tegraflash.py --bl cboot.bin --bct  P3448_A00_lpddr4_204Mhz_P987.cfg --odmdata 0xa4000 --bldtb kernel_tegra210-p3448-0000-p3449-0000-b00.dtb --applet nvtboot_recovery.bin  --cmd "flash; reboot"  --cfg flash.xml --chip 0x21    --bins "EBT cboot.bin; DTB tegra210-p3448-0000-p3449-0000-b00.dtb" 
saving flash command in /home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/flashcmd.txt
saving Windows flash command to /home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.2_Linux_JETSON_NANO_2GB_DEVKIT/Linux_for_Tegra/bootloader/flash_win.bat
assign_value: crc-flash.xml.bin 1 65520 1
printf '\x1' | dd of=crc-flash.xml.bin bs=1 seek=65520 count=1 conv=notrunc
1+0 records in
1+0 records out
1 byte copied, 0.000113605 s, 8.8 kB/s
assign_value: crc-flash.xml.bin 0 65521 1
printf '\x0' | dd of=crc-flash.xml.bin bs=1 seek=65521 count=1 conv=notrunc
1+0 records in
1+0 records out
1 byte copied, 9.5149e-05 s, 10.5 kB/s
assign_string: crc-flash.xml.bin PTHD 65528 4
echo PTHD | dd of=crc-flash.xml.bin bs=1 seek=65528 count=4 conv=notrunc
4+0 records in
4+0 records out
4 bytes copied, 0.000106582 s, 37.5 kB/s
*** Flashing target device started. ***
Welcome to Tegra Flash
version 1.0.0
Type ? or help for help and q or quit to exit
Use ! to execute system commands
 
[   0.0085 ] tegrasign --getmode mode.txt --key None
[   0.0093 ] Assuming zero filled SBK key
[   0.0094 ] 
[   0.0095 ] Generating RCM messages
[   0.0168 ] tegrarcm --listrcm rcm_list.xml --chip 0x21 0 --download rcm nvtboot_recovery.bin 0 0
[   0.0176 ] RCM 0 is saved as rcm_0.rcm
[   0.0180 ] RCM 1 is saved as rcm_1.rcm
[   0.0180 ] List of rcm files are saved in rcm_list.xml
[   0.0180 ] 
[   0.0181 ] Signing RCM messages
[   0.0200 ] tegrasign --key None --list rcm_list.xml --pubkeyhash pub_key.key
[   0.0207 ] Assuming zero filled SBK key
[   0.0251 ] 
[   0.0251 ] Copying signature to RCM mesages
[   0.0271 ] tegrarcm --chip 0x21 0 --updatesig rcm_list_signed.xml
[   0.0411 ] 
[   0.0412 ] Parsing partition layout
[   0.0438 ] tegraparser --pt flash.xml.tmp
[   0.0453 ] 
[   0.0455 ] Using default ramcode: 0
[   0.0455 ] Disable BPMP dtb trim, using default dtb
[   0.0455 ] 
[   0.0455 ] Creating list of images to be signed
[   0.0480 ] tegrahost --chip 0x21 0 --partitionlayout flash.xml.bin --list images_list.xml
[   0.1160 ] 
[   0.1161 ] Generating signatures
[   0.1203 ] tegrasign --key None --list images_list.xml --pubkeyhash pub_key.key
[   0.1224 ] Assuming zero filled SBK key
[   0.2144 ] 
[   0.2144 ] Generating br-bct
[   0.2334 ] tegrabct --bct P3448_A00_lpddr4_204Mhz_P987.cfg --chip 0x21 0
[   0.2575 ] 
[   0.2576 ] Updating boot device parameters
[   0.2608 ] tegrabct --bct P3448_A00_lpddr4_204Mhz_P987.bct --chip 0x21 0 --updatedevparam flash.xml.bin
[   0.2623 ] Warning: No sdram params
[   0.2626 ] 
[   0.2626 ] Updating bl info
[   0.2655 ] tegrabct --bct P3448_A00_lpddr4_204Mhz_P987.bct --chip 0x21 0 --updateblinfo flash.xml.bin --updatesig images_list_signed.xml
[   0.2678 ] 
[   0.2679 ] Updating secondary storage information into bct
[   0.2709 ] tegraparser --pt flash.xml.bin --chip 0x21 0 --updatecustinfo P3448_A00_lpddr4_204Mhz_P987.bct
[   0.2730 ] 
[   0.2731 ] Updating Odmdata
[   0.2759 ] tegrabct --bct P3448_A00_lpddr4_204Mhz_P987.bct --chip 0x21 0 --updatefields Odmdata =0xa4000
[   0.2775 ] Warning: No sdram params
[   0.2779 ] 
[   0.2779 ] Get Signed section of bct
[   0.2810 ] tegrabct --bct P3448_A00_lpddr4_204Mhz_P987.bct --chip 0x21 0 --listbct bct_list.xml
[   0.2829 ] 
[   0.2830 ] Signing BCT
[   0.2886 ] tegrasign --key None --list bct_list.xml --pubkeyhash pub_key.key
[   0.2900 ] Assuming zero filled SBK key
[   0.2908 ] 
[   0.2909 ] Updating BCT with signature
[   0.2938 ] tegrabct --bct P3448_A00_lpddr4_204Mhz_P987.bct --chip 0x21 0 --updatesig bct_list_signed.xml
[   0.2956 ] 
[   0.2957 ] Copying signatures
[   0.2987 ] tegrahost --chip 0x21 0 --partitionlayout flash.xml.bin --updatesig images_list_signed.xml
[   0.3070 ] 
[   0.3071 ] Updating BFS information on BCT
[   0.3104 ] tegrabct --bct P3448_A00_lpddr4_204Mhz_P987.bct --chip 0x21 0 --updatebfsinfo flash.xml.bin
[   0.3126 ] 
[   0.3127 ] Boot Rom communication
[   0.3156 ] tegrarcm --chip 0x21 0 --rcm rcm_list_signed.xml
[   0.3171 ] BR_CID: 0x3210100164457782240000000e068380
[   0.3459 ] RCM version 0X210001
[   0.3898 ] Boot Rom communication completed
[   1.3983 ] 
[   1.3984 ] Sending BCTs
[   1.4028 ] tegrarcm --download bct P3448_A00_lpddr4_204Mhz_P987.bct
[   1.4053 ] Applet version 00.01.0000
[   1.4837 ] Sending bct
[   1.4837 ] [................................................] 100%
[   1.7085 ] 
[   1.7132 ] tegrahost --chip 0x21 --align cboot.bin
[   1.7157 ] 
[   1.7197 ] tegrahost --magicid EBT --appendsigheader cboot.bin cboot.bin_blheader
[   1.7265 ] 
[   1.7288 ] tegrasign --key None --list cboot.bin_list.xml
[   1.7294 ] Assuming zero filled SBK key
[   1.7397 ] 
[   1.7421 ] tegrahost --updatesigheader cboot.bin_blheader.encrypt cboot.bin_blheader.hash zerosbk
[   1.7434 ] 
[   1.7459 ] tegrahost --chip 0x21 --align tegra210-p3448-0000-p3449-0000-b00.dtb
[   1.7466 ] 
[   1.7485 ] tegrahost --magicid DTB --appendsigheader tegra210-p3448-0000-p3449-0000-b00.dtb tegra210-p3448-0000-p3449-0000-b00.dtb_blheader
[   1.7498 ] 
[   1.7519 ] tegrasign --key None --list tegra210-p3448-0000-p3449-0000-b00.dtb_list.xml
[   1.7526 ] Assuming zero filled SBK key
[   1.7583 ] 
[   1.7603 ] tegrahost --updatesigheader tegra210-p3448-0000-p3449-0000-b00.dtb_blheader.encrypt tegra210-p3448-0000-p3449-0000-b00.dtb_blheader.hash zerosbk
[   1.7613 ] 
[   1.7616 ] Sending bootloader and pre-requisite binaries
[   1.7635 ] tegrarcm --download ebt cboot.bin.encrypt 0 0 --download rp1 tegra210-p3448-0000-p3449-0000-b00.dtb.encrypt 0
[   1.7641 ] Applet version 00.01.0000
[   1.8404 ] Sending ebt
[   1.8406 ] [................................................] 100%
[   1.9469 ] Sending rp1
[   1.9515 ] [................................................] 100%
[   2.0078 ] 
[   2.0117 ] tegrarcm --boot recovery
[   2.0138 ] Applet version 00.01.0000
[   2.0890 ] 
[   2.0892 ] Retrieving storage infomation
[   2.0929 ] tegrarcm --oem platformdetails storage storage_info.bin
[   2.0950 ] Applet is not running on device. Continue with Bootloader
[   2.8707 ] 
[   2.8733 ] tegradevflash --oem platformdetails storage storage_info.bin
[   2.8738 ] Cboot version 00.01.0000
[   2.9038 ] Saved platform info in storage_info.bin
[   2.9050 ] 
[   2.9051 ] Flashing the device
[   2.9088 ] tegradevflash --pt flash.xml.bin --storageinfo storage_info.bin --create
[   2.9109 ] Cboot version 00.01.0000
[   2.9549 ] Writing partition GPT with gpt.bin
[   2.9552 ] [................................................] 100%
[   2.9614 ] Writing partition PT with crc-flash.xml.bin
[  18.6983 ] [................................................] 100%
[  18.7050 ] Writing partition NVC with nvtboot.bin.encrypt
[  22.6151 ] [................................................] 100%
[  22.6290 ] Writing partition NVC_R with nvtboot.bin.encrypt
[  32.6432 ] [................................................] 100%
[  32.6598 ] Writing partition TBC with nvtboot_cpu.bin.encrypt
[  42.6832 ] [................................................] 100%
[  42.6961 ] Writing partition RP1 with kernel_tegra210-p3448-0000-p3449-0000-b00.dtb.encrypt
[  46.8635 ] [................................................] 100%
[  46.8816 ] Writing partition EBT with cboot.bin.encrypt
[  61.2967 ] [................................................] 100%
[  61.3255 ] Writing partition WB0 with warmboot.bin.encrypt
[  90.3823 ] [................................................] 100%
[  90.3932 ] Writing partition BPF with sc7entry-firmware.bin.encrypt
[  90.6568 ] [................................................] 100%
[  90.6677 ] Writing partition TOS with tos-mon-only.img.encrypt
[  90.9310 ] [................................................] 100%
[  90.9440 ] Writing partition DTB with kernel_tegra210-p3448-0000-p3449-0000-b00.dtb.encrypt
[  94.3799 ] [................................................] 100%
[  94.3987 ] Writing partition LNX with boot.img.encrypt
[ 108.8145 ] [................................................] 100%
[ 108.8489 ] Warning: EKS partition magic header mismatch!
[ 148.6405 ] Writing partition EKS with eks.img
[ 148.6410 ] [................................................] 100%
[ 148.6508 ] Writing partition BMP with bmp.blob
[ 148.9132 ] [................................................] 100%
[ 148.9404 ] Writing partition RP4 with rp4.blob
[ 157.9874 ] [................................................] 100%
[ 158.0081 ] Writing partition VER_b with qspi_bootblob_ver.txt
[ 165.8354 ] [................................................] 100%
[ 165.8492 ] Writing partition VER with qspi_bootblob_ver.txt
[ 166.1126 ] [................................................] 100%
[ 166.1230 ] Writing partition APP with system.img
[ 166.3857 ] [................................................] 100%
[ 679.3323 ] 
[ 679.3366 ] tegradevflash --write BCT P3448_A00_lpddr4_204Mhz_P987.bct
[ 679.3388 ] Cboot version 00.01.0000
[ 679.3707 ] Writing partition BCT with P3448_A00_lpddr4_204Mhz_P987.bct
[ 679.3711 ] [................................................] 100%
[ 686.0268 ] 
[ 686.0269 ] Flashing completed

[ 686.0271 ] Coldbooting the device
[ 686.0314 ] tegradevflash --reboot coldboot
[ 686.0337 ] Cboot version 00.01.0000
[ 686.0635 ] 
*** The target t210ref has been flashed successfully. ***
Reset the board to boot from internal eMMC.

You could check if the pinmux register of SPI2 related pins again with the previous command.

I will do this tomorrow. Sorry for the late reply.

I tried running this:

raven@raven-desktop:~$ sudo busybox devmem 0x70003050
0x0000E045

I got 0x0000E045 instead of 0x0000e015, but this is after I flashed the board with a fresh install.

grepping pin control register gives me this:

raven@raven-desktop:~$ sudo cat /sys/kernel/debug/tegra_pinctrl_reg | grep -i spi
Bank: 1 Reg: 0x70003050 Val: 0x0000e045 → spi1_mosi_pc0
Bank: 1 Reg: 0x70003054 Val: 0x0000e045 → spi1_miso_pc1
Bank: 1 Reg: 0x70003058 Val: 0x0000e045 → spi1_sck_pc2
Bank: 1 Reg: 0x7000305c Val: 0x0000e049 → spi1_cs0_pc3
Bank: 1 Reg: 0x70003060 Val: 0x0000e049 → spi1_cs1_pc4
Bank: 1 Reg: 0x70003064 Val: 0x00006046 → spi2_mosi_pb4
Bank: 1 Reg: 0x70003068 Val: 0x00006046 → spi2_miso_pb5
Bank: 1 Reg: 0x7000306c Val: 0x00006046 → spi2_sck_pb6
Bank: 1 Reg: 0x70003070 Val: 0x00006046 → spi2_cs0_pb7
Bank: 1 Reg: 0x70003074 Val: 0x00006045 → spi2_cs1_pdd0
Bank: 1 Reg: 0x70003078 Val: 0x0000e015 → spi4_mosi_pc7
Bank: 1 Reg: 0x7000307c Val: 0x0000e015 → spi4_miso_pd0
Bank: 1 Reg: 0x70003080 Val: 0x0000e015 → spi4_sck_pc5
Bank: 1 Reg: 0x70003084 Val: 0x0000e015 → spi4_cs0_pc6
Bank: 1 Reg: 0x70003088 Val: 0x00002040 → qspi_sck_pee0
Bank: 1 Reg: 0x7000308c Val: 0x00002000 → qspi_cs_n_pee1
Bank: 1 Reg: 0x70003090 Val: 0x00002040 → qspi_io0_pee2
Bank: 1 Reg: 0x70003094 Val: 0x00002040 → qspi_io1_pee3
Bank: 1 Reg: 0x70003098 Val: 0x00002040 → qspi_io2_pee4
Bank: 1 Reg: 0x7000309c Val: 0x00002040 → qspi_io3_pee5
Bank: 0 Reg: 0x70000b70 Val: 0x00000001 → drive_qspi_comp_control
Bank: 0 Reg: 0x70000b78 Val: 0x00000001 → drive_qspi_lpbk_control
Bank: 0 Reg: 0x70000a78 Val: 0x00808000 → drive_qspi_comp

I think at this point I could troubleshoot things better if I understood what to do with the .dtsi files that the excel sheet generates. I see references to what to do with them in other L4T versions, but the .dtsi files I have to override are not there. In the 32.7.3 version of L4T I’m using there’s no mention of what to do with the .dtsi files.

I don’t want to make things complicated, but I’m not sure what to do. I’m looking to know where to change the pinmux configuration in the device tree. The basics dev tree nodes is fine it’s just the pinmux.

The pinmux value seems still not the correct for SPI usage.

Could you help to provide the current pinmux speadsheet for further check?

It won’t let me upload it because says anti-virus thinks it could be hazardous. Here’s the output of the excel sheet’s .dtsi files:

tegra210-raven_nano_pinmux-pinmux.dtsi (38.1 KB)
tegra210-raven_nano_pinmux-gpio-default.dtsi (2.0 KB)

Here’s how it’s set in the spreadsheet:

Your pinmux spreadsheet seems so much different from the default one for Jetson TX2 devkit.

The deafult usage for PB.04, PB.05, PB.06 are not for SPI.

Are you sure that you are using TX2 with custom board?

Ohh maybe there’s some confusion we’re using the NX versions of Nano, TX2 and Xavier. Right now I’m focusing on Nano to at least get that one working.

Yes it’s a custom board.

What I tried to do yesterday is generate the two files the pinmux spreadsheet gives me, then copy paste the contents into Linux_for_Tegra/source/public/hardware/nvidia/platform/t210/porg/kernel-dts/porg-platforms/. There are several potential gpio and pinmux dtsi files it could be using. I narrowed it down to: tegra210-porg-pinmux-p3448-0000-b00.dtsi and tegra210-porg-gpio-p3448-0000-b00.dtsi. I saved a backup of them and overridden the contents with the .dtsi files the excel sheet created. tegra210-p3448-0000-p3449-0000-b00.dts references that it is using those two .dtsi files I overridden. I don’t know for sure that this is what’s being used to build part of the kernel, but it is the only referrence I could find in the source files that had a similar layout as the .dtsi files created by the spreadsheet. I couldn’t find any other .dtsi files that had pinmux or gpio in the name either.

I then went into Linue_for_Tergra/out/ (which is my output folder for the kernel build), then opened up the .config file and changed

CONFIG_SPI_SPIDEV=m

to

CONFIG_SPI_SPIDEV=y

. There are several other drivers so not sure if I have to enable any others.

I then recompiled the kernel with:

make ARCH=arm64 O=$TEGRA_KERNEL_OUT -j4

and then copied the Image and dtb folder to the Linux_for_Tegra folder with the flash.sh script, then re-installed the kernel modules with:

sudo make ARCH=arm64 O=$TEGRA_KERNEL_OUT modules_install \INSTALL_MOD_PATH=/home/galaxiams/nvidia/nvidia_sdk/JetPack_4.6.3_Linux_JETSON_NANO_TARGETS/Linux_for_Tegra/rootfs/

Those last steps are following the guide for my L4T version: https://docs.nvidia.com/jetson/archives/l4t-archived/l4t-3273/index.html#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide/kernel_custom.html#, which interestingly doesn’t have instructions on how to change the pinmux and gpio assignment like come other L4T versions I’ve seen.

Sorry I know that’s a lot of info I hope it makes sense.

Just a quick update.

I was able to successfully alter the pinmux using the datasheet. I had set the pins for spi to pull_down, but changed the chip select to pull_up by default, and now if I look at my oscciloscope the chip select is now HIGH all the time which is good. So at least I know my changes are being implemented.

The issue now is that SCK is always HIGH and MISO and MOSI don’t output data. chip select doesn’t go low at all. Below is the spi device tree node for spi0 and spi1 that I pulled from the boot folder of the nano:

spi@7000d400 {
	compatible = "nvidia,tegra210-spi";
	reg = <0x0 0x7000d400 0x0 0x200>;
	interrupts = <0x0 0x3b 0x4>;
	iommus = <0x30 0xe>;
	#address-cells = <0x1>;
	#size-cells = <0x0>;
	dmas = <0x50 0xf 0x50 0xf>;
	dma-names = "rx", "tx";
	nvidia,clk-parents = "pll_p", "clk_m";
	clocks = <0x26 0x29 0x26 0xf3 0x26 0xe9>;
	clock-names = "spi", "pll_p", "clk_m";
	resets = <0x26 0x29>;
	reset-names = "spi";
	status = "okay";
	linux,phandle = <0xf2>;
	phandle = <0xf2>;

prod-settings {
		#prod-cells = <0x3>;

		prod {
			prod = <0x4 0xfff 0x0>;
		};

		prod_c_flash {
			status = "disabled";
			prod = <0x4 0x3f 0x7>;
		};

		prod_c_loop {
			status = "disabled";
			prod = <0x4 0xfff 0x44b>;
		};
	};

	spi@0 {
		compatible = "tegra-spidev";
		reg = <0x0>;
		spi-max-frequency = <0x1f78a40>;

		controller-data {
			nvidia,enable-hw-based-cs;
			nvidia,rx-clk-tap-delay = <0x7>;
		};
	};

	spi@1 {
		compatible = "tegra-spidev";
		reg = <0x1>;
		spi-max-frequency = <0x1f78a40>;

		controller-data {
			nvidia,enable-hw-based-cs;
			nvidia,rx-clk-tap-delay = <0x7>;
		};
	};
};

spi@7000d600 {
	compatible = "nvidia,tegra210-spi";
	reg = <0x0 0x7000d600 0x0 0x200>;
	interrupts = <0x0 0x52 0x4>;
	iommus = <0x30 0xe>;
	#address-cells = <0x1>;
	#size-cells = <0x0>;
	dmas = <0x50 0x10 0x50 0x10>;
	dma-names = "rx", "tx";
	nvidia,clk-parents = "pll_p", "clk_m";
	clocks = <0x26 0x2c 0x26 0xf3 0x26 0xe9>;
	clock-names = "spi", "pll_p", "clk_m";
	resets = <0x26 0x2c>;
	reset-names = "spi";
	status = "okay";
	linux,phandle = <0xf3>;
	phandle = <0xf3>;

	prod-settings {
		#prod-cells = <0x3>;

		prod {
			prod = <0x4 0xfff 0x0>;
		};

		prod_c_flash {
			status = "disabled";
			prod = <0x4 0x3f 0x6>;
		};

		prod_c_loop {
			status = "disabled";
			prod = <0x4 0xfff 0x44b>;
		};
	};

	spi@0 {
		compatible = "tegra-spidev";
		reg = <0x0>;
		spi-max-frequency = <0x1f78a40>;

		controller-data {
			nvidia,enable-hw-based-cs;
			nvidia,rx-clk-tap-delay = <0x6>;
		};
	};

	spi@1 {
		compatible = "tegra-spidev";
		reg = <0x1>;
		spi-max-frequency = <0x1f78a40>;

		controller-data {
			nvidia,enable-hw-based-cs;
			nvidia,rx-clk-tap-delay = <0x6>;
		};
	};
};

So, we are talking about Jetson Nano + custom board from now.
But your topic is about TX2, I would suggest you opening another topic to avoid the misleading platform for others.
And please help to provide the information of the following:

  1. Platform (Jetson Nano/Jetson TX2/Xavier AGX/Xavier NX…etc)
  2. Devkit or Custom board
  3. Jetpack version
  4. Pinmux spreadsheet in use
  5. serial console log