# Steps to enable SPI interface on AGX Xavier **URL:** \ **Category:** Jetson AGX Xavier\ **Tags:** spi\ **Created:** [November 23, 2020, 3:37pm UTC](https://forums.developer.nvidia.com/t/steps-to-enable-spi-interface-on-agx-xavier/160209 "2020-11-23T15:37:51Z")\ **Posts on this page:** 14\ **Page:** 1
**Author:** ![anandprakaas](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@anandprakaas](https://forums.developer.nvidia.com/u/anandprakaas)\ **Post date:** [November 23, 2020, 3:37pm UTC](https://forums.developer.nvidia.com/t/steps-to-enable-spi-interface-on-agx-xavier/160209/1 "2020-11-23T15:37:51Z")
Hello, I want to integrate the Beaglebone AI with the Xavier AGX bus using CAN interface. I am using “MCP2515 CAN Bus Breakout Board With SPI Interface” for this. The JetPack version I am using is 4.4. Can anyone please help me with the steps to enable the SPI interface on Xavier AGX board? Thanks in advance. ---
**Author:** ![ShaneCCC](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/shaneccc/32/14043_2.png) [@ShaneCCC](https://forums.developer.nvidia.com/u/ShaneCCC)\ **Post date:** [November 24, 2020, 1:48am UTC](https://forums.developer.nvidia.com/t/steps-to-enable-spi-interface-on-agx-xavier/160209/3 "2020-11-24T01:48:41Z")
Have a reference to below link for SPI pin configure. > [@SPI1 not work on Xavier](https://forums.developer.nvidia.com/t/spi1-not-work-on-xavier/72141): > > I enable the spi1 and add spidev device node in dts. I can find the /dev/spidev0.0, but I can’t detect the signal with Logical Analysis. So, I want to know that the SPI1 is spidev0.0, right ? ---
**Author:** ![anandprakaas](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@anandprakaas](https://forums.developer.nvidia.com/u/anandprakaas)\ **Post date:** [November 24, 2020, 2:22pm UTC](https://forums.developer.nvidia.com/t/steps-to-enable-spi-interface-on-agx-xavier/160209/4 "2020-11-24T14:22:57Z")
> [@anandprakaas](#): > > rate the Beaglebone AI with the Xavier AGX bus using CAN interface. I am using “MCP2515 CAN I downloaded the bsp source code ([https://developer.nvidia.com/embedded/L4T/r32\_Release\_v4.4/r32\_Release\_v4.4-GMC3/Sources/T186/public\_sources.tbz2](https://developer.nvidia.com/embedded/L4T/r32_Release_v4.4/r32_Release_v4.4-GMC3/Sources/T186/public_sources.tbz2)) on the target NVIDIA AGX device.but I cannot find the .cfg extension file for t18x platform. The board type is t186ref. I can only find the .cfg file for the t19x platforms. I am confused whether this should be done on the host machine or the NVIDIA AGX target board. Can you please clarify the following points: a) Do I need to create a .cfg file for spi interface with the pinmux modifications? b) Can you please point me to the data sheet which contains the address of the spi device? c) Do I need to modify/create a new device tree blob file? ---
**Author:** ![anandprakaas](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@anandprakaas](https://forums.developer.nvidia.com/u/anandprakaas)\ **Post date:** [November 24, 2020, 3:46pm UTC](https://forums.developer.nvidia.com/t/steps-to-enable-spi-interface-on-agx-xavier/160209/5 "2020-11-24T15:46:44Z")
“Please modify the pinmux for spi1 like spi2 does. file name: tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg” I cannot find the tegra19x-mb1-pinmux-p2888-0000-a04-p2822-0000-b01.cfg in the BSP source code. ---
**Author:** ![ShaneCCC](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/shaneccc/32/14043_2.png) [@ShaneCCC](https://forums.developer.nvidia.com/u/ShaneCCC)\ **Post date:** [November 24, 2020, 3:59pm UTC](https://forums.developer.nvidia.com/t/steps-to-enable-spi-interface-on-agx-xavier/160209/6 "2020-11-24T15:59:14Z")
The cfg file gen by the sdkmanager. Please download the sdkmanager to check it. ---
**Author:** ![anandprakaas](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@anandprakaas](https://forums.developer.nvidia.com/u/anandprakaas)\ **Post date:** [November 24, 2020, 4:16pm UTC](https://forums.developer.nvidia.com/t/steps-to-enable-spi-interface-on-agx-xavier/160209/7 "2020-11-24T16:16:46Z")
Thanks for the update. I have applied the Rt linux patch to make the kernel real time. I did this by downloading the BSP source code (on Nvidia AGX board)and then compiling the kernel image using Rt linux patch. How can I flash the Jetson xavier with RT linux patch and the SPI interface enabled? ---
**Author:** ![ShaneCCC](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/shaneccc/32/14043_2.png) [@ShaneCCC](https://forums.developer.nvidia.com/u/ShaneCCC)\ **Post date:** [November 25, 2020, 2:44am UTC](https://forums.developer.nvidia.com/t/steps-to-enable-spi-interface-on-agx-xavier/160209/8 "2020-11-25T02:44:33Z")
Have a check below link to update the dtb and just replace the /boot/Image for the customized kernel Image. ---
**Author:** ![anandprakaas](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@anandprakaas](https://forums.developer.nvidia.com/u/anandprakaas)\ **Post date:** [November 25, 2020, 1:27pm UTC](https://forums.developer.nvidia.com/t/steps-to-enable-spi-interface-on-agx-xavier/160209/9 "2020-11-25T13:27:59Z")
Hi Shane, I don’t see the link. Are you referring the link you posted earlier? ---
**Author:** ![ShaneCCC](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/shaneccc/32/14043_2.png) [@ShaneCCC](https://forums.developer.nvidia.com/u/ShaneCCC)\ **Post date:** [November 25, 2020, 1:37pm UTC](https://forums.developer.nvidia.com/t/steps-to-enable-spi-interface-on-agx-xavier/160209/10 "2020-11-25T13:37:50Z")
Sorry, Please check below link. [https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%2520Linux%2520Driver%2520Package%2520Development%2520Guide%2Fkernel\_custom.html%23](https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%2520Linux%2520Driver%2520Package%2520Development%2520Guide%2Fkernel_custom.html%23) ---
**Author:** ![anandprakaas](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@anandprakaas](https://forums.developer.nvidia.com/u/anandprakaas)\ **Post date:** [November 27, 2020, 11:35am UTC](https://forums.developer.nvidia.com/t/steps-to-enable-spi-interface-on-agx-xavier/160209/11 "2020-11-27T11:35:00Z")
I did the pinmux configuration for the SPI1 device. What are the steps to create the corresponding device tree file? Should that be done on host machine or target Nvidia device? I found this post to modify the device tree > [@ADC using SPI on Xavier](https://forums.developer.nvidia.com/t/adc-using-spi-on-xavier/77735): > > Hi guys, I connected the ADC (MCP3208) to the Expansion Header (SPI1\_MOSI(19), SPI1\_MISO(21), SPI1\_SCK(23) and SP1\_CS0(24)) and tried to read the value of the potentiometer. However, the output result was 0.0V. With the help of various people, I enabled SPI1 of Xavier. I maked spidev1.0 occurred at /dev/ directory . However, when running the following program, the value will be 0.0 V. import spidev Vref = 3.3 ch0 = [0x06,0x00,0x00] spi = spidev.SpiDev() spi.open(1,0) #spi1.0 spi.max\_speed… ---
**Author:** ![ShaneCCC](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/shaneccc/32/14043_2.png) [@ShaneCCC](https://forums.developer.nvidia.com/u/ShaneCCC)\ **Post date:** [November 27, 2020, 2:05pm UTC](https://forums.developer.nvidia.com/t/steps-to-enable-spi-interface-on-agx-xavier/160209/12 "2020-11-27T14:05:11Z")
The reference link is update the cfg file and update the image from host machine. 1. download skdmanager. 2. Using sdkmanager to download and install the image. 3. Modify the cfg file that gen by the sdkmanger. You can find the path from the sdkmanager GUI 4. modify the cfg file 5. flash the Image again. ---
**Author:** ![anandprakaas](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@anandprakaas](https://forums.developer.nvidia.com/u/anandprakaas)\ **Post date:** [December 1, 2020, 1:57pm UTC](https://forums.developer.nvidia.com/t/steps-to-enable-spi-interface-on-agx-xavier/160209/13 "2020-12-01T13:57:59Z")
> [@ShaneCCC](#): > > - ng sdkmanager to download and install the image. > - Modify the cfg file that gen by the sdkmanger. You can find the path from the sdkmanager GUI > - modify the cfg file I downloaded the nvidia target source code using the sdk manager. The JetPack version is “JetPack\_4.4\_Linux\_JETSON\_AGX\_XAVIER”. However, the bsp version in nv\_tegra folder show the JetPack version as 32.4.3. Here are the steps that I performed: 1. Downloaded the nvidia\_host and nvidia\_target source code using sdk manager. 2. Ran the script source\_sync.sh with tag tegra-l4t-32.4.4. This downloads the source in the new folder created with the name “sources” containing kernel/kernel-4.9, u-boot and hardware sub directory. 3. Go to directory kernel/kernel-4.9 and applied the rt-linux patch and modified the pinmux settings. 4. Built the kernel. make ARCH=arm64 O=$TEGRA\_KERNEL\_OUT -j8 5. Copied the image and dts directory to Linux\_for\_Tegra/kernel/Image and Linux\_for\_Tegra/kernel/dtb. 6. Installed the kernel modules. 7. Flashed the image using sudo ./flash.sh jetson-xavier mmcblk0p1. When I execute the uname -a command it does not reflect the RT Linux and rather reflects the normal Linux image. The byte size of the Image built does not match with the byte size of the Image flashed. The /dev/ directory shows two files spidev0.0 and spidev0.1. and insmod shows that the spidev is installed. After running the spidev\_test(downloaded from linux open source) with /dev/spidev0.0 I do see the packets being send and received. I connected to MISO and MOSI pins (pin 19 and 21). My further question is : How do I modify the transmission speed? What is the reason that the RT-Linux is not enabled? ---
**Author:** ![ShaneCCC](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/shaneccc/32/14043_2.png) [@ShaneCCC](https://forums.developer.nvidia.com/u/ShaneCCC)\ **Post date:** [December 2, 2020, 3:18am UTC](https://forums.developer.nvidia.com/t/steps-to-enable-spi-interface-on-agx-xavier/160209/14 "2020-12-02T03:18:21Z")
You need to replace the Image to apply the customized kernel Image too. spidev\_test -s should be able to set the speed. ---
**Author:** ![TomNVIDIA](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/tomnvidia/32/14181_2.png) [@TomNVIDIA](https://forums.developer.nvidia.com/u/TomNVIDIA)\ **Post date:** [October 18, 2021, 6:20pm UTC](https://forums.developer.nvidia.com/t/steps-to-enable-spi-interface-on-agx-xavier/160209/16 "2021-10-18T18:20:56Z")
Closed on October 18, 2021, 6:20pm UTC