Strategy for external reset / sudden power loss on custom carrier board for Orin Nano

Robotics & Edge Computing Jetson & Embedded Systems Jetson Orin Nano
,
1

Hello everyone,

at a custom carrier board design for a Jetson Orin Nano SoM an external reset source is required to reset the SoM during operation from a Master MCU.
The carrier board does not have a power button. Furthermore it is required not to use an MCU (as EFM8SB10F2G-A-QFN20 at the NVIDIA DevBoard) for Power Supply and Sequencing.

  1. Is there a design example (provided from NVIDIA or third party) for Power Supply and Sequencing (without Power button) without applying a MCU ?

  2. Is it generally possible to perform an external reset directly at hardware level by de-asserting POWER_EN or pull down SYS-RESET*? Is this allowed? Or is it required to always assert SHUTDOWN_REQ* before which obviously only can be done internally by firmware or operating system (maybe by a kind of GPIO interrupt to the operating system which asserts SHUTDOWN_REQ*)?
    In the Design Guide it is stated “SHUTDOWN_REQ* must always be serviced by the carrier board to toggle POWER_EN from high to low, even in cases of sudden power loss.” Is SHUTDOWN_REQ* automatically asserted by the Orin Nano SoM in case of a power loss?

  3. What is the most sufficient reset mechanism for our case? De-assert POWER_EN or pull down SYS_RESET* (see Design Guide p. 17: “When the system is powered on, SYS_RESET* can be driven by the carrier board to reset the SoC and QSPI boot device. This will not result in a full system power cycle.”) In the latter, case is it sufficient to pull down SYS_RESET* against Ground by a MOSFET?

  4. POWER_EN is an analogue input. What are the voltage thresholds of the internal Schmitt trigger switching on and switching off the POWER_EN signal? I could not find any information in the Datasheet or the Design Guide.

Regards,
Sven

3

You can refer to ON/OFF logic design in nano carrier board P3449 schematic in DLC for non-MCU design. SYS_RESET can be used as the external reset source as you can see in DG. VIH of POWER_EN is about 3.85V.

4

Hello Trumany,

thanks for the answer.
Regarding my question #2: In the Design Guide it is stated “SHUTDOWN_REQ* must always be serviced by the carrier board to toggle POWER_EN from high to low, even in cases of sudden power loss.” This is obviously done by the Orin SoM PMIC by a kind of supervisor at an “undervoltage event (under 4.18V)”.
Is that mandatory to do this in this way? In our custom carrier board design a voltage supervisor is included working with the limits VDD_IN = 5V+/-5% according to the recommended operating conditions (see Orin nano datasheet). The supervisor output directly drives POWER_EN. However, in this case SHUTDOWN_REQ* is not asserted. Is this allowed, may we directly drive POWER_EN without SHUTDOWN_REQ* is asserted?

Regards,
Sven

5

It is a MUST requirement.

7

This topic was automatically closed 14 days after the last reply. New replies are no longer allowed.