Hello every, need some help please on integrating the PWM1/PWM7 on the external header of the dev kit using seeed-j4012 carrier with jetson orin nx 16G SOM, here my device tree configuration.
Note:
- I already added the support of pwm of backlight in fbtft-core.
- I see all my data on the spi interface and they are coherent.
- I see my pwm backlight instance in sysfs and also as a consumer of pwmchip3 (pwm@32e0000).
- I see my pinmux is applyed.
- all my drivers are probed form fbtft, pwm, backlight…
Am other last point may I know why the pwm is not officially exposed as pin function in the kernel dts, this will help me to know how to design my stuff around the Jetson products.
I noticed that if we take the jetPack 6.1/6.2 it works only if we use jetson-io to generate an overlay.
Does anyone faced this kind of issue.
Thanks in advance for your support.
/ {
bus@0 {
backlight_enable: regulator-backlight-enable {
compatible = "regulator-fixed";
regulator-name = "BACKLIGHT_ENABLE";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA234_MAIN_GPIO(N, 1) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
pwm@32e0000 {
pinctrl-names = "default";
pinctrl-0 = <&pwm7_pinmux>;
status = "okay";
};
pwm_backlight: pwm-backlight@7 {
compatible = "pwm-backlight";
power-supply = <&backlight_enable>;
pwms = <&pwm7 0 45334>;
brightness-levels = <0 51 53 56 62 75 101 152 255>;
default-brightness-level = <7>;
status = "okay";
};
spi_hdr40: spi@3210000 {
num-cs = <1>;
cs-gpios = <&gpio TEGRA234_MAIN_GPIO(Z, 6) GPIO_ACTIVE_LOW>;
status = "okay";
/delete-node/ spi@0;
display@0 {
compatible = "sitronix,st7789v";
pinctrl-names = "default";
pinctrl-0 = <&spi1_pinmux>;
backlight = <&pwm_backlight>;
spi-max-frequency = <25000000>;
reset-gpios = <&gpio TEGRA234_MAIN_GPIO(AC, 6) GPIO_ACTIVE_LOW>;
dc-gpios = <&gpio TEGRA234_MAIN_GPIO(Z, 7) GPIO_ACTIVE_HIGH>;
spi-cs-high;
width = <320>;
height = <240>;
buswidth = <8>;
of_backlight = <1>;
reg = <0>;
status = "okay";
};
};
};
};
&pinmux {
pwm7_pinmux: pinmux-pwm7 {
hdr40-pin32 {
nvidia,pins = "soc_gpio19_pg6";
nvidia,function = "gp";
nvidia,pin-group = "pwm7";
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
hdr40-pin15 {
nvidia,pins = "soc_gpio39_pn1";
nvidia,function = "gp";
nvidia,pin-group = "pwm1";
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
};
spi1_pinmux: pinmux-spi1 {
hdr40-pin23 {
nvidia,pins = "spi1_sck_pz3";
nvidia,function = "spi1";
nvidia,pin-label = "spi1_sck";
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
hdr40-pin24 {
nvidia,pins = "spi1_cs0_pz6";
nvidia,function = "spi1";
nvidia,pin-label = "spi1_cs0";
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
hdr40-pin19 {
nvidia,pins = "spi1_mosi_pz5";
nvidia,function = "spi1";
nvidia,pin-label = "spi1_dout";
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
hdr40-pin26 {
nvidia,pins = "spi1_cs1_pz7";
nvidia,function = "spi1";
nvidia,pin-label = "spi1_cs1";
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
};
};