We are developing a Sovereign Local Breakout (LBO) platform for African MNOs, currently being validated as a technical contribution to ITU-T SG13 (Future Networks). Our architecture utilizes BlueField-3 DPUs for wire-speed (100Gbps) traffic mediation and steering.
Technical Hurdle: We are experiencing a synchronization bottleneck when attempting to steer packets based on expert.ai semantic metadata while maintaining high GTP-U encapsulation/decapsulation throughput.
GTP-U Offload Latency: What is the recommended DOCA Flow pipeline configuration to minimize the “Handshake” latency between the BlueField-3 packet capture and the L40S GPU inference engine for real-time steering decisions?
Synchronous Steering: Under high GTP-U load, we see jitter in the doca_flow_pipe_action when updating steering rules dynamically. Are there best practices for lockless rule updates in the hardware eSwitch to ensure zero packet loss during LBO transitions?
Auditability: Does DOCA support hardware-level timestamping for Signed CDR (Call Detail Record) generation without impacting the decapsulation performance on the ARM cores?
Urgency: This implementation is the core of our demo for the ITU SG13 workshop in May. Any guidance on optimizing the GTP-U decap → Inference → LBO Action loop within the DOCA framework would be highly valuable.
BlueField-3 and DOCA support hardware offload of GTP-U encapsulation/decapsulation and steering via DOCA Flow. GTP-U is one of the supported tunnel types in the DOCA Flow Programming Guide, where GTP tunnels can be matched and used for encap/decap actions in hardware.
For integrating GPU inference with L40S, DOCA documents GPUNetIO and the GPU Packet Processing application as examples of a GPU-centric path where CUDA kernels work with DOCA Flow / DOCA Ethernet queues directly, with minimal CPU involvement; see the DOCA GPUNetIO pages and the DOCA GPU Packet Processing Application Guide.
For dynamic steering and rule updates, the DOCA Flow guides describe how to add and update pipe entries with DOCA_FLOW_WAIT_FOR_BATCH vs DOCA_FLOW_NO_WAIT, and the DOCA Flow Programming Guide together with the DOCA Flow Tune Tool show how to profile insertion behavior, hardware counters and pipeline structure for a given Flow program.
For auditability and CDRs, DOCA Ethernet supports per-packet hardware RX timestamps that can be enabled on the RX queue (timestamp in nanoseconds since epoch) and retrieved alongside packet metadata, so applications can build signed records without adding timestamping logic to the decap path; see the DOCA Ethernet guide, RXQ “Receive Offloads” and timestamp retrieval.
Because your use case combines several advanced components (GTP-U offload, GPU inference, dynamic steering, and CDR requirements) and you have a workshop deadline, the forum can only point to the relevant documentation and examples. For concrete design recommendations or validation of a specific “GTP-U decap → inference → LBO steering” pipeline on BlueField-3, please contact your NVIDIA sales / account team or NVIDIA Enterprise Support so they can review the architecture with you in detail.
Thank you for the detailed guidance and confirmations. This aligns well with our deployment model. I’ve taken this forward to NVIDIA Enterprise Support and the AI‑RAN Alliance for the formal architecture review and reference‑architecture evaluation.