Sys_reset pin function related issues

Hello, I would like to ask Jetson Orin Nano card SYS_RESET* pin, when can it be used as an input pin and when can it be used as an output pin? How do I use the input and output characteristics of the pin when I design the carried board?
Also, Which peripherals on my own carried board needs to be powered after the core board is powered on?

You can get below info in Orin nano Design Guide doc in DLC.

 SYS_RESET* is bidirectional. The signal is controlled by the Power Sequencer or PMIC
during power-on and power-off. When the system is powered on, SYS_RESET* can be driven
by the carrier board to reset the SoC and QSPI boot device. This will not result in a full
system power cycle.
 SYS_RESET* is not asserted externally during the power-down sequence. When POWER_EN is
de-asserted, the Power Sequencer or PMIC performs a power down sequence which
includes asserting SYS_RESET*.