T4000 module cfg pcie c4 x8 cause boot Exception

SDK : r39.2.1
T4000 Hardware environment:
PCIE C4 X8 Connection FPGA
PCIE C2 X1 Connection FPGA
PCIE C1 X1 Connection NVME (System Disc)
PCIE C3 X2 Connection U.2

Modification of steps:
1.Compile bootloader/generic/tegra64-bpmp-3834-0000-4071-xxxx.dtb to tegra264-bpmp-3834-0000-4071-xxxt.dts
2.Modify tegra264-bpmp-3834-0000-4071-xxxx.dts
uphy {
status = “okay”;
uphy0-config = <0x06>;
uphy1-config = <0x00>;
};
pcie {
pcie@0 {
status = “disabled”;
pcie-id = <0x00>;
pcie-mode = <0x01>;
};
pcie@1 {
status = “okay”;
pcie-id = <0x01>;
pcie-mode = <0x01>;
max-link-speed = <0x05>;
};
pcie@2 {
status = “okay”;
pcie-id = <0x02>;
pcie-mode = <0x01>;
max-link-speed = <0x05>;
};
pcie@3 {
status = “okay”;
pcie-id = <0x03>;
pcie-mode = <0x01>;
max-link-speed = <0x05>;
};
pcie@4 {
status = “okay”;
pcie-id = <0x04>;
pcie-mode = <0x01>;
max-link-speed = <0x05>;
};
pcie@5 {
status = “disable”;
pcie-id = <0x05>;
pcie-mode = <0x01>;
max-link-speed = <0x05>;
};
};

  1. Recompile tegra264-bpmp-3834-0000-4071-xxxx.dts to tegra264-bpmp-3834-0000-4071-xxxx.dtb

  2. Copy tegra264-bpmp-3834-0000-4071-xxxx.dtb to the bootloader directory and the bootloader/generic directory

  3. Modify bootloader/tegra264-mb1-bct-pinmux-p3834-xxxx-p4071-0000.dtsi
    pex_l4_clkreq_n_pd0 {
    nvidia,pins = “pex_l4_clkreq_n_pd0”;
    nvidia,function = “pe4_clkreq_l”;
    nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    nvidia,tristate = <TEGRA_PIN_DISABLE>;
    nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    nvidia,drv-type = <TEGRA_PIN_1X_DRIVER>;
    nvidia,e-io-od = <TEGRA_PIN_ENABLE>;
    nvidia,e-lpbk = <TEGRA_PIN_DISABLE>;
    };
    pex_l4_rst_n_pd1 {
    nvidia,pins = “pex_l4_rst_n_pd1”;
    nvidia,function = “pe4_rst_l”;
    nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    nvidia,tristate = <TEGRA_PIN_DISABLE>;
    nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    nvidia,drv-type = <TEGRA_PIN_1X_DRIVER>;
    nvidia,e-io-od = <TEGRA_PIN_DISABLE>;
    nvidia,e-lpbk = <TEGRA_PIN_DISABLE>;
    };
    pex_l5_clkreq_n_pd2 {
    nvidia,pins = “pex_l5_clkreq_n_pd2”;
    nvidia,function = “rsvd1”;
    nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    nvidia,tristate = <TEGRA_PIN_ENABLE>;
    nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    nvidia,drv-type = <TEGRA_PIN_1X_DRIVER>;
    nvidia,e-io-od = <TEGRA_PIN_DISABLE>;
    nvidia,e-lpbk = <TEGRA_PIN_DISABLE>;
    };
    pex_l5_rst_n_pd3 {
    nvidia,pins = “pex_l5_rst_n_pd3”;
    nvidia,function = “rsvd1”;
    nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    nvidia,tristate = <TEGRA_PIN_ENABLE>;
    nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    nvidia,drv-type = <TEGRA_PIN_1X_DRIVER>;
    nvidia,e-io-od = <TEGRA_PIN_DISABLE>;
    nvidia,e-lpbk = <TEGRA_PIN_DISABLE>;
    };

  4. Burning with sudo ./l4t_initrd_flash.sh --erase-all jetson-agx-thor-t4000 internal
    The T4000 module uart error message is as follows:
    [8002 0] STMM: StandaloneMJetson (version 39.2.1-gcid-46758480)
    [8002 0] STMM: StandaloneMJetson (built on 2026-08-07T04:48:38+00:00)
    [8002 0] STMM: Boot Complete
    INFO: Initialized VM: 0x8002, boot_order: 1
    NOTICE: Finished initializing all VMs.
    NOTICE: BL31 Boot Complete
    ��t26x_general UEFI firmware (version 39.2.1-gcid-46758480 built on 2026-08-07T04:47:49+00:00)
    3h
    ��Unhandled Exception in EL3.
    x30 = 0x0000000000ff411f4
    x0 = 0x000000000000000
    x1 = 0x000000000000000
    x2 = 0x00000000000000011
    x3 = 0x00000000000000000000
    x4 = 0x000000000000000
    x5 = 0x0000000000ff96bc0
    x6 = 0xffffffffffffffffffd8
    x7 = 0x00000081200b0000
    x8 = 0x00000000000000000000
    x9 = 0x0000000000ff78000
    x10 = 0x55aababd9a453f5
    x11 = 0x55aaadae668eb591
    x12 = 0x00000000000000000000
    x13 = 0x0000000000ff96788
    x14 = 0x00000081200b1000
    x15 = 0x0000000f82565000
    x16 = 0x0000000f7b7a7a7340
    x17 = 0x000000000000000
    x18 = 0x0000000000f7b7b0100
    x19 = 0x0000000000ff793f0
    x20 = 0x00000000000000000000
    x21 = 0x000000000000000
    x22 = 0x000000000000000
    x23 = 0x000000000000000
    x24 = 0x000000000000000
    x25 = 0x00000000000000000000
    x26 = 0x000000000000000
    x27 = 0x000000000000000
    x28 = 0x000000000000000
    x29 = 0x000000000000000
    scr_el3 = 0x0000000401c0703d
    sctlr_el3 = 0x00000000b0cd183f
    cptr_el3 = 0x000000000000000♠
    tcr_el3 = 0x0000000000♠80853510
    daif = 0x00000000000000000
    mair_el3 = 0x0000000000404ff
    spsr_el3 = 0x0000000000004000309
    elr_el3 = 0x0000000f7a7c8e6c
    ttbr0_el3 = 0x0000000000ff99001
    esr_el3 = 0x0000000000000000011
    far_el3 = 0xe7fce97ff6c95df6
    spsr_el1 = 0x000000000000000
    elr_el1 = 0x000000000000000
    sprs_abt = 0x000000000000000
    spsr_und = 0x000000000000000
    sprs_irq = 0x000000000000000
    sprs_fiq = 0x000000000000000
    sctlr_el1 = 0x0000000000009080
    actlr_el1 = 0x000000000000000
    cpacr_el1 = 0x0000000000300000
    cssler_el1 = 0x00000000000000002
    sp_el1 = 0x000000000000000
    esr_el1 = 0x000000000000000
    ttbr0_el1 = 0x000000000000000
    ttbr1_el1 = 0x000000000000000
    mair_el1 = 0x000000000000000
    amair_el1 = 0x000000000000000
    tcr_el1 = 0x000000000000000
    tpidr_el1 = 0x000000000000000
    tpidr_el0 = 0x000000000000000
    tpidrro_el0 = 0x000000000000000
    par_el1 = 0x00000000000000000
    mpidr_el1 = 0x0000000000♠
    afsr0_el1 = 0x000000000000000
    afsr1_el1 = 0x000000000000000
    contextidr_el1 = 0x000000000000000
    vbar_el1 = 0x000000000000000
    cntp_ctl_el0 = 0x000000000000000♠5
    cntp_cval_el0 = 0x000000026a7b0ce8
    cntv_ctl_el0 = 0x000000000000000
    cntv_cval_el0 = 0x000000000000000
    cntkctl_el1 = 0x000000000000000
    sp_el0 = 0x0000000f7b7b0100
    isr_el1 = 0x000000000000000♠40
    cpuectlr_el1 = 0xc0007403c0543001
    gicd_ispendr regs (Offsets 0x200 - 0x278)
    Offset: value
    0000000000000200: 0x00000000000000000000
    0000000000000204: 0x00000000000000000000
    0000000000000208: 0x000000000000000
    000000000000020c: 0x00000000000000008
    0000000000000210: 0x000000000000000000000000000000
    0000000000000214: 0x00000000000000000000
    0000000000000218: 0x00000000000000000000
    000000000000021c: 0x00000000000000000000
    0000000000000220: 0x00000000000000000000
    0000000000000224: 0x00000000000000000000
    0000000000000228: 0x00000000000000000000
    000000000000022c: 0x00000000000000000000
    0000000000000230: 0x00000000000000000000
    0000000000000234: 0x00000000000000000000
    0000000000000238: 0x0000000000000000000000000
    000000000000023c: 0x00000000000000000000
    0000000000000240: 0x00000000000000000000
    0000000000000244: 0x00000000000000000000♠
    0000000000000248: 0x00000000000000000000
    000000000000024c: 0x00000000000000000000
    0000000000000250: 0x0000000000100800
    0000000000000254: 0x00000000000000000000
    0000000000000258: 0x00000000000000000000
    000000000000025c: 0x000000000000000800000
    0000000000000260: 0x00000000000000000000
    0000000000000264: 0x00000000000000000000
    0000000000000268: 0x00000000000000000000
    000000000000026c: 0x00000000000000000000
    0000000000000270: 0x00000000000000000000
    0000000000000274: 0x00000000000000000000
    0000000000000278: 0x00000000000000000000
    000000000000027c: 0x00000000000000000000

You could try to disable PCIe C4 in UEFI dtb and enabled it in kernel DTB first and see if you could bypass the issue.

Thank for you suggest.
config pcie c4 x8 mode, need BPFDTB “tegra264-bpmp-3834-0000-4071-xxxx.dtb” and Kernel DTB “tegra264-p4071-0000+p3834-0000-nv.dtb”
both two dtb files msut configed match, then brun flash successful and bring up successful.