had you try NV16?
$ v4l2-ctl -d /dev/video0 --set-fmt-video=width=1920,height=1080,pixelformat=NV16 --set-ctrl bypass_mode=0 --stream-mmap --stream-count=300
please also check whether you’ve code snippet from Topic 252803 included.
Hi @JerryChang,
I did as you suggested :
- Adding the patch of Topic 252803
diff --git a/kernel/nvidia/drivers/media/platform/tegra/camera/vi/vi5_fops.c b/kernel/nvidia/drivers/media/platform/tegra/camera/vi/vi5_fops.c
index 69ebee6a8..8f0df46e1 100644
--- a/kernel/nvidia/drivers/media/platform/tegra/camera/vi/vi5_fops.c
+++ b/kernel/nvidia/drivers/media/platform/tegra/camera/vi/vi5_fops.c
@@ -304,6 +304,9 @@ static int tegra_channel_capture_setup(struct tegra_channel *chan, unsigned int
setup.csi_port = csi_chan->ports[vi_port].csi_port;
}
+ if (chan->fmtinfo->fourcc == V4L2_PIX_FMT_NV16)
+ setup.channel_flags |= CAPTURE_CHANNEL_FLAG_SEMI_PLANAR;
+
err = vi_capture_setup(chan->tegra_vi_channel[vi_port], &setup);
if (err) {
dev_err(chan->vi->dev, "vi capture setup failed\n");
@@ -354,6 +357,12 @@ static void vi5_setup_surface(struct tegra_channel *chan,
desc_memoryinfo->surface[0].size = chan->format.bytesperline * height;
desc->ch_cfg.atomp.surface_stride[0] = bpl;
+ if (chan->fmtinfo->fourcc == V4L2_PIX_FMT_NV16) {
+ desc_memoryinfo->surface[1].base_address = offset + chan->format.sizeimage / 2;
+ desc_memoryinfo->surface[1].size = chan->format.bytesperline * height;
+ desc->ch_cfg.atomp.surface_stride[1] = bpl;
+ }
+
if (chan->embedded_data_height > 0) {
- Launching v4l2-ctl command for NV16 : same result
trace_v4l2_nv16.txt (795.2 KB)
hi @JerryChang,
As it seemed that I was able to dump out some (not all) NVCSI/VI REGs, do you have any suggestion about the REGs that should be checked, please ?
Thanks in advance and best regards,
Khang
Hi @JerryChang,
According the trace files that I shared, especially the most recent ones (trace_v4l2.txt and trace_v4l2_nv16.txt), below is my finding :
After receiving the first frame with 4 pair of CHANSEL_PXL_SOF/CHANSEL_PXL_EOF :
kworker/1:7-140 [001] .... 103.551637: rtcpu_vinotify_event: tstamp:4059206507 cch:0 vi:0 tag:FS channel:0x00 frame:1 vi_tstamp:129891804864 data:0x0000000000000010
kworker/1:7-140 [001] .... 103.551637: rtcpu_vinotify_event: tstamp:4059206674 cch:0 vi:0 tag:ATOMP_FS channel:0x00 frame:1 vi_tstamp:129891804896 data:0x0000000800000000
kworker/1:7-140 [001] .... 103.551638: rtcpu_vinotify_event: tstamp:4059206818 cch:0 vi:0 tag:CHANSEL_PXL_SOF channel:0x23 frame:1 vi_tstamp:129891808928 data:0x0000000000000001
kworker/1:7-140 [001] .... 103.551639: rtcpu_vinotify_event: tstamp:4059206976 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:129891815424 data:0x0000000008020001
kworker/1:7-140 [001] .... 103.611561: rtcpu_vinotify_error: tstamp:4060164160 cch:0 vi:0 tag:CSIMUX_FRAME channel:0x00 frame:1 vi_tstamp:129925171392 data:0x00000000000000a0
kworker/1:7-140 [001] .... 103.611572: rtcpu_vinotify_event: tstamp:4060166846 cch:0 vi:0 tag:CHANSEL_PXL_EOF channel:0x23 frame:1 vi_tstamp:129923836800 data:0x0000000004370002
kworker/1:7-140 [001] .... 103.611573: rtcpu_vinotify_event: tstamp:4060167015 cch:0 vi:0 tag:ATOMP_FRAME_DONE channel:0x23 frame:1 vi_tstamp:129923837312 data:0x0000000000000000
kworker/1:7-140 [001] .... 103.611574: rtcpu_vinotify_event: tstamp:4060167158 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:129923842080 data:0x0000000002020001
kworker/1:7-140 [001] .... 103.611575: rtcpu_vinotify_event: tstamp:4060167316 cch:0 vi:0 tag:CSIMUX_FRAME channel:0x00 frame:1 vi_tstamp:129925171392 data:0x00000000000000a0
kworker/1:7-140 [001] .... 103.611575: rtcpu_vinotify_event: tstamp:4060167486 cch:0 vi:0 tag:FS channel:0x00 frame:1 vi_tstamp:129925171392 data:0x0000000000000010
kworker/1:7-140 [001] .... 103.611576: rtcpu_vinotify_event: tstamp:4060167651 cch:0 vi:0 tag:ATOMP_FE channel:0x00 frame:1 vi_tstamp:129925171392 data:0x0000000800000000
kworker/1:7-140 [001] .... 103.611576: rtcpu_vinotify_event: tstamp:4060167793 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:129925184800 data:0x0000000000020001
kworker/1:7-140 [001] .... 103.611577: rtcpu_vinotify_event: tstamp:4060494965 cch:0 vi:0 tag:ATOMP_FS channel:0x00 frame:1 vi_tstamp:129925171392 data:0x0000000800000000
kworker/1:7-140 [001] .... 103.611578: rtcpu_vinotify_event: tstamp:4060495111 cch:0 vi:0 tag:CHANSEL_PXL_SOF channel:0x23 frame:1 vi_tstamp:129925175456 data:0x0000000000000001
kworker/1:7-140 [001] .... 103.611578: rtcpu_vinotify_event: tstamp:4060495318 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:129925207840 data:0x0000000008020002
kworker/1:7-140 [001] .... 103.611579: rtcpu_vinotify_event: tstamp:4060495457 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:129925354688 data:0xcd9ce50010000000
kworker/1:7-140 [001] .... 103.611580: rtcpu_vinotify_event: tstamp:4060495615 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:129925366656 data:0x0000000031000003
kworker/1:7-140 [001] .... 103.611580: rtcpu_vinotify_event: tstamp:4061173198 cch:0 vi:0 tag:CHANSEL_PXL_EOF channel:0x23 frame:1 vi_tstamp:129957203296 data:0x0000000004370002
kworker/1:7-140 [001] .... 103.611581: rtcpu_vinotify_event: tstamp:4061173361 cch:0 vi:0 tag:ATOMP_FRAME_DONE channel:0x23 frame:1 vi_tstamp:129957203840 data:0x0000000000000000
kworker/1:7-140 [001] .... 103.611582: rtcpu_vinotify_event: tstamp:4061173504 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:129957208640 data:0x0000000002020002
kworker/1:7-140 [001] .... 103.611582: rtcpu_vinotify_error: tstamp:4061206839 cch:0 vi:0 tag:CSIMUX_FRAME channel:0x00 frame:1 vi_tstamp:129958537856 data:0x00000000000000a0
kworker/1:7-140 [001] .... 103.611584: rtcpu_vinotify_event: tstamp:4061210949 cch:0 vi:0 tag:CSIMUX_FRAME channel:0x00 frame:1 vi_tstamp:129958537856 data:0x00000000000000a0
kworker/1:7-140 [001] .... 103.611584: rtcpu_vinotify_event: tstamp:4061211096 cch:0 vi:0 tag:FS channel:0x00 frame:1 vi_tstamp:129958537856 data:0x0000000000000010
kworker/1:7-140 [001] .... 103.611585: rtcpu_vinotify_event: tstamp:4061211263 cch:0 vi:0 tag:ATOMP_FE channel:0x00 frame:1 vi_tstamp:129958537888 data:0x0000000800000000
kworker/1:7-140 [001] .... 103.611586: rtcpu_vinotify_event: tstamp:4061211403 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:129958551296 data:0x0000000000020002
kworker/1:7-140 [001] .... 103.611586: rtcpu_vinotify_event: tstamp:4061211567 cch:0 vi:0 tag:ATOMP_FS channel:0x00 frame:1 vi_tstamp:129958537888 data:0x0000000800000000
kworker/1:7-140 [001] .... 103.611587: rtcpu_vinotify_event: tstamp:4061211709 cch:0 vi:0 tag:CHANSEL_PXL_SOF channel:0x23 frame:1 vi_tstamp:129958541952 data:0x0000000000000001
kworker/1:7-140 [001] .... 103.611588: rtcpu_vinotify_event: tstamp:4061211870 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:129958571648 data:0x0000000008020003
kworker/1:7-140 [001] .... 103.611588: rtcpu_vinotify_event: tstamp:4061212010 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:129958721568 data:0xcd9ce20010000000
kworker/1:7-140 [001] .... 103.671557: rtcpu_vinotify_event: tstamp:4061546271 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:129958758848 data:0x0000000031000004
kworker/1:7-140 [001] .... 103.671561: rtcpu_vinotify_event: tstamp:4062224233 cch:0 vi:0 tag:CHANSEL_PXL_EOF channel:0x23 frame:1 vi_tstamp:129990569824 data:0x0000000004370002
kworker/1:7-140 [001] .... 103.671562: rtcpu_vinotify_event: tstamp:4062224397 cch:0 vi:0 tag:ATOMP_FRAME_DONE channel:0x23 frame:1 vi_tstamp:129990570336 data:0x0000000000000000
kworker/1:7-140 [001] .... 103.671562: rtcpu_vinotify_event: tstamp:4062224541 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:129990575104 data:0x0000000002020003
kworker/1:7-140 [001] .... 103.671564: rtcpu_vinotify_error: tstamp:4062249510 cch:0 vi:0 tag:CSIMUX_FRAME channel:0x00 frame:1 vi_tstamp:129991904384 data:0x00000000000000a0
kworker/1:7-140 [001] .... 103.671570: rtcpu_vinotify_event: tstamp:4062563461 cch:0 vi:0 tag:CSIMUX_FRAME channel:0x00 frame:1 vi_tstamp:129991904384 data:0x00000000000000a0
kworker/1:7-140 [001] .... 103.671571: rtcpu_vinotify_event: tstamp:4062563605 cch:0 vi:0 tag:FS channel:0x00 frame:1 vi_tstamp:129991904384 data:0x0000000000000010
kworker/1:7-140 [001] .... 103.671571: rtcpu_vinotify_event: tstamp:4062563771 cch:0 vi:0 tag:ATOMP_FE channel:0x00 frame:1 vi_tstamp:129991904416 data:0x0000000800000000
kworker/1:7-140 [001] .... 103.671572: rtcpu_vinotify_event: tstamp:4062563911 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:129991917792 data:0x0000000000020003
kworker/1:7-140 [001] .... 103.671573: rtcpu_vinotify_event: tstamp:4062564073 cch:0 vi:0 tag:ATOMP_FS channel:0x00 frame:1 vi_tstamp:129991904416 data:0x0000000800000000
kworker/1:7-140 [001] .... 103.671573: rtcpu_vinotify_event: tstamp:4062564213 cch:0 vi:0 tag:CHANSEL_PXL_SOF channel:0x23 frame:1 vi_tstamp:129991908480 data:0x0000000000000001
kworker/1:7-140 [001] .... 103.671574: rtcpu_vinotify_event: tstamp:4062564371 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:129991938144 data:0x0000000008020004
kworker/1:7-140 [001] .... 103.731550: rtcpu_vinotify_error: tstamp:4063292136 cch:0 vi:0 tag:CSIMUX_FRAME channel:0x00 frame:1 vi_tstamp:130025270880 data:0x00000000000000a0
kworker/1:7-140 [001] .... 103.731553: rtcpu_vinotify_error: tstamp:4063292729 cch:0 vi:0 tag:CHANSEL_NOMATCH channel:0x01 frame:1 vi_tstamp:130025274944 data:0x00000000000003c9
kworker/1:7-140 [001] .... 103.731560: rtcpu_vinotify_event: tstamp:4063294501 cch:0 vi:0 tag:CHANSEL_PXL_EOF channel:0x23 frame:1 vi_tstamp:130023936288 data:0x0000000004370002
kworker/1:7-140 [001] .... 103.731561: rtcpu_vinotify_event: tstamp:4063294663 cch:0 vi:0 tag:ATOMP_FRAME_DONE channel:0x23 frame:1 vi_tstamp:130023936864 data:0x0000000000000000
kworker/1:7-140 [001] .... 103.731562: rtcpu_vinotify_event: tstamp:4063294816 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:130023941664 data:0x0000000002020004
The next trace is mainly / repeatedly with CHANSEL_NOMATCH/CSIMUX_FRAME/CHANSEL_NOMATCH/CSIMUX_FRAME/FS sequence:
kworker/1:7-140 [001] .... 103.731567: rtcpu_vinotify_event: tstamp:4063614921 cch:0 vi:0 tag:CHANSEL_NOMATCH channel:0x01 frame:1 vi_tstamp:130025274944 data:0x00000000000003c9
kworker/1:7-140 [001] .... 103.731568: rtcpu_vinotify_error: tstamp:4064333614 cch:0 vi:0 tag:CSIMUX_FRAME channel:0x00 frame:1 vi_tstamp:130058637408 data:0x00000000000000a0
kworker/1:7-140 [001] .... 103.731569: rtcpu_vinotify_error: tstamp:4064334189 cch:0 vi:0 tag:CHANSEL_NOMATCH channel:0x01 frame:1 vi_tstamp:130058641472 data:0x00000000000003c9
kworker/1:7-140 [001] .... 103.731569: rtcpu_vinotify_event: tstamp:4064631856 cch:0 vi:0 tag:CSIMUX_FRAME channel:0x00 frame:1 vi_tstamp:130058637408 data:0x00000000000000a0
kworker/1:7-140 [001] .... 103.731570: rtcpu_vinotify_event: tstamp:4064632015 cch:0 vi:0 tag:FS channel:0x00 frame:1 vi_tstamp:130058637408 data:0x0000000000000010
According to Jetson/l4t/Camera BringUp - eLinux.org :
CHANSEL_NOMATCH channel:0x01 … data:0x00000000000003c9
(3c9 = 0011 1100 1001)
- bit [0] means no_match : 1 → indicating that a mismatch error did occur
- bit [1-4 ] means CTYPE : 0100 = 4 = LS → this mismatch error is related to the start of a line of data ?
- bit [5-10] means DTYPE : 11101 = 30 = NvCsiDataType_YUV422_8 → expected format
CSIMUX_FRAME channel:0x00 … data:0x00000000000000a0
(a0 = 10100000)
- bit [0:2] means STREAM_ID = 000,
- bit [3] means VPR = 0,
- bit [4] means FS_flag = 0,
- bit [5] means FE_flag = 1,
- bit [6] means FE_CSI_FAULT = 0,
- bit [7] means FS_FAULT = 1,
What could cause no_match here? Is there something really related to the start of a line of data ?
K.
Hi @JerryChang,
I would like to update this ticket as after reviewing and updating the FPGA design, we could get the streaming working on the FPGA devkit with following log/trace as evidence :
vi-output, ev95-3795 [001] .... 395.583250: tegra_channel_capture_frame: sof:417.167111712
vi-output, ev95-3795 [001] .... 395.583254: tegra_channel_capture_frame: eof:417.199142912
kworker/0:0-4042 [000] .... 395.611004: rtcpu_vinotify_event: tstamp:13036954439 cch:0 vi:0 tag:ATOMP_FE channel:0x00 frame:1 vi_tstamp:417165776384 data:0x0000000800000000
kworker/0:0-4042 [000] .... 395.611008: rtcpu_vinotify_event: tstamp:13036954594 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:417165851424 data:0x0000000000022057
kworker/0:0-4042 [000] .... 395.611010: rtcpu_vinotify_event: tstamp:13036954775 cch:0 vi:0 tag:FS channel:0x00 frame:2 vi_tstamp:417167107616 data:0x0000000000000010
kworker/0:0-4042 [000] .... 395.611011: rtcpu_vinotify_event: tstamp:13036954930 cch:0 vi:0 tag:ATOMP_FS channel:0x00 frame:2 vi_tstamp:417167107680 data:0x0000000800000000
kworker/0:0-4042 [000] .... 395.611012: rtcpu_vinotify_event: tstamp:13036955103 cch:0 vi:0 tag:CHANSEL_PXL_SOF channel:0x23 frame:2 vi_tstamp:417167111712 data:0x0000000000000001
kworker/0:0-4042 [000] .... 395.611013: rtcpu_vinotify_event: tstamp:13036955254 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:2 vi_tstamp:417167149184 data:0x0000000008022058
kworker/0:0-4042 [000] .... 395.611014: rtcpu_vinotify_event: tstamp:13036955428 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:417167389696 data:0xcd9ce50010000000
kworker/0:0-4042 [000] .... 395.611015: rtcpu_vinotify_event: tstamp:13036955577 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:417167433120 data:0x0000000031002059
kworker/0:0-4042 [000] .... 395.611023: rtcpu_vinotify_event: tstamp:13037497760 cch:0 vi:0 tag:CHANSEL_PXL_EOF channel:0x23 frame:2 vi_tstamp:417199139584 data:0x0000000004370002
kworker/0:0-4042 [000] .... 395.611024: rtcpu_vinotify_event: tstamp:13037497919 cch:0 vi:0 tag:ATOMP_FRAME_DONE channel:0x23 frame:2 vi_tstamp:417199140480 data:0x0000000000000000
kworker/0:0-4042 [000] .... 395.611025: rtcpu_vinotify_event: tstamp:13037498090 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:2 vi_tstamp:417199163776 data:0x0000000002022058
kworker/0:0-4042 [000] .... 395.611026: rtcpu_vinotify_event: tstamp:13037498239 cch:0 vi:0 tag:FE channel:0x00 frame:2 vi_tstamp:417199142816 data:0x0000000000000020
kworker/0:0-4042 [000] .... 395.611027: rtcpu_vinotify_event: tstamp:13037498414 cch:0 vi:0 tag:ATOMP_FE channel:0x00 frame:2 vi_tstamp:417199142912 data:0x0000000800000000
kworker/0:0-4042 [000] .... 395.611028: rtcpu_vinotify_event: tstamp:13037498565 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:2 vi_tstamp:417199209056 data:0x0000000000022058
kworker/0:0-4042 [000] .... 395.611030: rtcpu_vinotify_event: tstamp:13037523168 cch:0 vi:0 tag:FS channel:0x00 frame:1 vi_tstamp:417200474112 data:0x0000000000000010
kworker/0:0-4042 [000] .... 395.611031: rtcpu_vinotify_event: tstamp:13037523326 cch:0 vi:0 tag:ATOMP_FS channel:0x00 frame:1 vi_tstamp:417200474208 data:0x0000000800000000
kworker/0:0-4042 [000] .... 395.611032: rtcpu_vinotify_event: tstamp:13038039948 cch:0 vi:0 tag:CHANSEL_PXL_SOF channel:0x23 frame:1 vi_tstamp:417200478240 data:0x0000000000000001
kworker/0:0-4042 [000] .... 395.611033: rtcpu_vinotify_event: tstamp:13038040103 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:417200528544 data:0x0000000008022059
kworker/0:0-4042 [000] .... 395.611034: rtcpu_vinotify_event: tstamp:13038040276 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:417200806208 data:0xcd9ce20010000000
kworker/0:0-4042 [000] .... 395.611035: rtcpu_vinotify_event: tstamp:13038040431 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:417200849664 data:0x000000003100205a
vi-output, ev95-3795 [001] .... 395.616617: tegra_channel_capture_frame: sof:417.200478240
vi-output, ev95-3795 [001] .... 395.616621: tegra_channel_capture_frame: eof:417.232509440
vi-output, ev95-3795 [001] .... 395.649967: tegra_channel_capture_frame: sof:417.233844736
vi-output, ev95-3795 [001] .... 395.649972: tegra_channel_capture_frame: eof:417.265875936
kworker/0:0-4042 [000] .... 395.666953: rtcpu_vinotify_event: tstamp:13038571258 cch:0 vi:0 tag:CHANSEL_PXL_EOF channel:0x23 frame:1 vi_tstamp:417232506112 data:0x0000000004370002
kworker/0:0-4042 [000] .... 395.666957: rtcpu_vinotify_event: tstamp:13038571414 cch:0 vi:0 tag:ATOMP_FRAME_DONE channel:0x23 frame:1 vi_tstamp:417232507008 data:0x0000000000000000
kworker/0:0-4042 [000] .... 395.666958: rtcpu_vinotify_event: tstamp:13038571586 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:417232530272 data:0x0000000002022059
kworker/0:0-4042 [000] .... 395.666959: rtcpu_vinotify_event: tstamp:13038571734 cch:0 vi:0 tag:FE channel:0x00 frame:1 vi_tstamp:417232509312 data:0x0000000000000020
kworker/0:0-4042 [000] .... 395.666960: rtcpu_vinotify_event: tstamp:13038571909 cch:0 vi:0 tag:ATOMP_FE channel:0x00 frame:1 vi_tstamp:417232509440 data:0x0000000800000000
kworker/0:0-4042 [000] .... 395.666961: rtcpu_vinotify_event: tstamp:13038572058 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:417232575584 data:0x0000000000022059
kworker/0:0-4042 [000] .... 395.666962: rtcpu_vinotify_event: tstamp:13038572228 cch:0 vi:0 tag:FS channel:0x00 frame:2 vi_tstamp:417233840640 data:0x0000000000000010
kworker/0:0-4042 [000] .... 395.666963: rtcpu_vinotify_event: tstamp:13038572381 cch:0 vi:0 tag:ATOMP_FS channel:0x00 frame:2 vi_tstamp:417233840704 data:0x0000000800000000
kworker/0:0-4042 [000] .... 395.666964: rtcpu_vinotify_event: tstamp:13038572551 cch:0 vi:0 tag:CHANSEL_PXL_SOF channel:0x23 frame:2 vi_tstamp:417233844736 data:0x0000000000000001
kworker/0:0-4042 [000] .... 395.666998: rtcpu_vinotify_event: tstamp:13038572700 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:2 vi_tstamp:417233882176 data:0x000000000802205a
kworker/0:0-4042 [000] .... 395.667000: rtcpu_vinotify_event: tstamp:13038572870 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:417234147424 data:0xcd9ce50010000000
kworker/0:0-4042 [000] .... 395.667001: rtcpu_vinotify_event: tstamp:13038573018 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:417234190880 data:0x000000003100205b
kworker/0:0-4042 [000] .... 395.667003: rtcpu_vinotify_event: tstamp:13039613150 cch:0 vi:0 tag:CHANSEL_PXL_EOF channel:0x23 frame:2 vi_tstamp:417265872608 data:0x0000000004370002
kworker/0:0-4042 [000] .... 395.667004: rtcpu_vinotify_event: tstamp:13039613304 cch:0 vi:0 tag:ATOMP_FRAME_DONE channel:0x23 frame:2 vi_tstamp:417265873504 data:0x0000000000000000
kworker/0:0-4042 [000] .... 395.667005: rtcpu_vinotify_event: tstamp:13039613481 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:2 vi_tstamp:417265896800 data:0x000000000202205a
kworker/0:0-4042 [000] .... 395.667006: rtcpu_vinotify_event: tstamp:13039613643 cch:0 vi:0 tag:FE channel:0x00 frame:2 vi_tstamp:417265875872 data:0x0000000000000020
kworker/0:0-4042 [000] .... 395.667007: rtcpu_vinotify_event: tstamp:13039613820 cch:0 vi:0 tag:ATOMP_FE channel:0x00 frame:2 vi_tstamp:417265875936 data:0x0000000800000000
kworker/0:0-4042 [000] .... 395.667008: rtcpu_vinotify_event: tstamp:13039613969 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:2 vi_tstamp:417265942080 data:0x000000000002205a
kworker/0:0-4042 [000] .... 395.667009: rtcpu_vinotify_event: tstamp:13039614142 cch:0 vi:0 tag:FS channel:0x00 frame:1 vi_tstamp:417267207136 data:0x0000000000000010
kworker/0:0-4042 [000] .... 395.667010: rtcpu_vinotify_event: tstamp:13039614296 cch:0 vi:0 tag:ATOMP_FS channel:0x00 frame:1 vi_tstamp:417267207232 data:0x0000000800000000
kworker/0:0-4042 [000] .... 395.667011: rtcpu_vinotify_event: tstamp:13039614484 cch:0 vi:0 tag:CHANSEL_PXL_SOF channel:0x23 frame:1 vi_tstamp:417267211264 data:0x0000000000000001
kworker/0:0-4042 [000] .... 395.667012: rtcpu_vinotify_event: tstamp:13039614633 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:417267248672 data:0x000000000802205b
kworker/0:0-4042 [000] .... 395.667013: rtcpu_vinotify_event: tstamp:13039614803 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:417267495232 data:0xcd9ce20010000000
vi-output, ev95-3795 [001] .... 395.683371: tegra_channel_capture_frame: sof:417.267211264
vi-output, ev95-3795 [001] .... 395.683376: tegra_channel_capture_frame: eof:417.299242464
vi-output, ev95-3795 [001] .... 395.716707: tegra_channel_capture_frame: sof:417.300577760
vi-output, ev95-3795 [001] .... 395.716711: tegra_channel_capture_frame: eof:417.332608960
trace-ok.txt (3.7 MB)
However, we are still struggling with the custom board :
kworker/0:2-85 [000] .... 431.121992: rtcpu_nvcsi_intr: tstamp:14283687296 class:CORRECTABLE_ERR type:STREAM_VC phy:0 cil:0 st:0 vc:0 status:0x00000004
kworker/0:2-85 [000] .... 431.121992: rtcpu_nvcsi_intr: tstamp:14283688223 class:GLOBAL type:STREAM_VC phy:0 cil:0 st:0 vc:0 status:0x00000004
kworker/0:2-85 [000] .... 431.121993: rtcpu_nvcsi_intr: tstamp:14283688223 class:CORRECTABLE_ERR type:STREAM_VC phy:0 cil:0 st:0 vc:0 status:0x00000004
kworker/0:2-85 [000] .... 431.121993: rtcpu_nvcsi_intr: tstamp:14283689150 class:GLOBAL type:STREAM_VC phy:0 cil:0 st:0 vc:0 status:0x00000004
trace_20240906.txt (381.1 KB)
Maybe I will open a new ticket for this issue with the custom board. What do you think?
Thanks and regards,
K.
may I also know the difference between FPGA devkit and custom board ?
it’s reporting correctable error, the error code 0x4 indicate packet payload CRC check failed.
and… it seems you already file another thread for asking that, right?
For the difference btw the FPGA Devkit and the custom board :
- FPGA Devkit : the FPGA chipset is on its devkit and we only made adapter boards for the LVDS camera input and MIPI-CSI2 output to interface with it via cables.
- Custom board : We put the FPGA chipset onto our own board, there’s direct pcb wiring from the FPGA chipset to the Nvidia Jetson Xavier NX SoM.
I’d already created a ticket with similar error code, but it is outdated since the configuration was different at that time : the clock mode was continuous, the FPGA design wasn’t working. Now the clock mode is discontinuous and we have the working reference of the fpga design which is the case of the FPGA Devkit. The weird thing is that we got CRC error with our own board while this is not the case with the FPGA Devkit.
hello khang.l4es,
just an FYI,
CSI it is susceptible to multiple factors, such as… trace length, temperature, wear of the components, and also MIPI speeds.
honestly, there’re lots of camera bug within early JP-5 release version.
you may give it a try with setting higher pixel clock rate (increase 15%~20%) from your sensor device tree for testing.
I doubled the piz_clk_hz to 297000000 and updated the mclk_muliplier accordingly but still facing the issue.
please refer to Topic 226574 to apply camera firmware with debug flag enabled on JetPack-5.0.2/l4t-r35.1
I updated the camera-rtcpu-t194-rce.img as instructed :
$ pwd
/home/khang/Workspace/Ref/Platforms/Nvidia/Jetson/sdk_install/JetPack_5.0.2_Linux_JETSON_XAVIER_NX_TARGETS
$ cp ~/Downloads/debug-camera-fw/l4t-r35.1/t194-Xavier/camera-rtcpu-t194-rce.img Linux_for_Tegra/bootloader/camera-rtcpu-t194-rce.img
then re-flashed the whole jetpack using the SDK manager (instead of using the flash command) but the firmware seemed not take effect : no specific message # dmesg
If I expect to use the flash command in CLI mode, what board config should I use as I am doing the testing with a custom board?
Hi @JerryChang,
Update : I used following command to update the rtcpu-rce firmware :on my custom board :
khang@NUC8i7HVK Linux_for_Tegra $ sudo ./flash.sh -r -k rce-fw jetson-xavier-nx-devkit-emmc mmcblk0p1
....
[ 32.9280 ] tegradevflash_v2 --write rce-fw 1_camera-rtcpu-t194-rce_sigheader.img.encrypt
[ 32.9290 ] Bootloader version 01.00.0000
[ 33.3322 ] Writing partition rce-fw with 1_camera-rtcpu-t194-rce_sigheader.img.encrypt [ 535984 bytes ]
[ 33.3349 ] [................................................] 100%
[ 40.4593 ] Coldbooting the device
[ 40.4618 ] tegrarcm_v2 --ismb2
[ 41.2670 ] tegradevflash_v2 --reboot coldboot
[ 41.2681 ] Bootloader version 01.00.0000
*** The [rce-fw] has been updated successfully. ***
Now with active streaming (but only one frame shown), the dmesg show :
[ 103.684637] [RCE] NVCSILP clock rate = 204000000 Hz.
[ 103.684661] [RCE] tegra_nvcsi_stream_set_config(vm0, stream=0, csi=0)
[ 103.684678] [RCE] MIPI clock = 594000 kHz, tHS-SETTLE = 0, tCLK-SETTLE = 0
[ 103.684694] [RCE] ===== NVCSI Stream Configuration =====
[ 103.684709] [RCE] stream_id: PP 0, csi_port: PORT A
[ 103.684724] [RCE] Brick: PHY 0, Mode: D-PHY
[ 103.684740] [RCE] Partition: CIL A, LP bypass: Enabled, Lanes: 4
[ 103.684755] [RCE] Clock information:
[ 103.684770] [RCE] MIPI clock rate: 594.00 MHz
[ 103.684785] [RCE] T_HS settle: 0, T_CLK settle: 0
[ 103.684800] [RCE] ======================================
[ 103.684815] [RCE] tegra_nvcsi_stream_open(vm0, stream=0, csi=0)
[ 103.684830] [RCE] nvcsi_calc_ths_settle ths_settle 19
[ 103.684846] [RCE] nvcsi_calc_ths_settle ths_settle 19
[ 103.684863] [RCE] nvcsi_calc_ths_settle ths_settle 19
[ 103.684879] [RCE] nvcsi_calc_tclk_settle tclk_settle 33
[ 103.684910] [RCE] ISR PHY 0 CIL_A 0x110
[ 103.684918] [RCE] ISR PHY 0 CIL_B 0x10
[ 103.684923] [RCE] nvcsi_calc_ths_settle ths_settle 19
[ 103.684929] [RCE] nvcsi_calc_ths_settle ths_settle 19
[ 103.684934] [RCE] nvcsi_calc_ths_settle ths_settle 19
[ 103.684940] [RCE] nvcsi_calc_tclk_settle tclk_settle 33
[ 103.725702] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 2, flags: 0, err_data 4194400
[ 103.740591] [RCE] ISR PHY 0 CIL_A 0x22
[ 103.740602] [RCE] ISR PHY 0 CIL_A 0x22
[ 103.740608] [RCE] ISR PHY 0 CIL_A 0x22
[ 103.740613] [RCE] ISR PHY 0 CIL_A 0x22
[ 103.759076] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 1, flags: 0, err_data 4194400
[ 103.792737] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 2, flags: 0, err_data 4194400
[ 103.796617] [RCE] ISR PHY 0 CIL_A 0x22
[ 103.796632] [RCE] ISR PHY 0 CIL_A 0x22
[ 103.796665] [RCE] ISR PHY 0 CIL_A 0x22
[ 103.796670] [RCE] ISR PHY 0 CIL_A 0x22
[ 103.825796] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 1, flags: 0, err_data 4194400
[ 103.852616] [RCE] ISR PHY 0 CIL_A 0x22
[ 103.852628] [RCE] ISR PHY 0 CIL_A 0x22
[ 103.908632] [RCE] ISR PHY 0 CIL_A 0x22
[ 103.908662] [RCE] ISR PHY 0 CIL_A 0x22
[ 103.908668] [RCE] ISR PHY 0 CIL_A 0x22
[ 103.908674] [RCE] ISR PHY 0 CIL_A 0x22
…
[ 107.621532] [RCE] tegra_nvcsi_stream_close(vm0, stream=0, csi=0)
dmesg_rce.txt (78.5 KB)
Another question : Why the MIPI clock = 594000 kHz? According to the following calculation How to calculate UI value? - #3 by ShaneCCC :
MIPI clock = pix_clk_hz*depth/lanes = pix_clk_hz*csi_pixel_bit_depth/lanes = 297000000 *16 / 4 = 1188000000 Hz (or 1188000 KHz or 1188 MHz) instead of 594000 KHz
Best Regards,
Khang
hello khang.l4es,
you should running with flash.sh to update rce-fw individually.
it is (1188 MHz) divided by 2 for sending to RCE as MIPI clock rate.
you may refer to TRM for [7.2.1.4.8 NVCSI PHY Registers],
for instance, it’s reported by NVCSI_PHY_0_CILA_INTR_0_STATUS_CILA_0,
the error code 0x22 shows these two failures, intr_cil_data_lane_sot_sb_err0_a and intr_cil_data_lane_sot_sb_err1_a.
unfortunately, I did not kept JP-5.0.2 code-base to re-built the rce firmware at the moment.
here’s RCE firmware Topic305036_Sep09.zip (254.8 KB) built from JetPack 5.1/ L4T 35.2.1.
it’s rce-fw to disable such SOT SB (and also SOT MB) errors during calibration, let’s have a quick try to apply this rce-fw update onto your target for verification.
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MIPI clock is double data clock rate.
So, the MIPICLK=tMIPICLK/2. So, 1188000/2=594000
Hi @JerryChang and @ShaneCCC,
With some review and modification from the fpga side, we are now having the working version of the design with the log in attachment.
rtr_trace_20240909_ok.txt (1.2 MB)
We are now conducting the endurance test (6 hours without interruption). We just observe that there’s certain delay / latency ~200ms with the preview on the HDMI display using gstreamer command : gst-launch-1.0 v4l2src device=/dev/video0 ! video/x-raw,format=UYVY ! videoconvert ! xvimagesink
but not accumulated for endurance streaming :
Would you tell if it could be something with the gstreamer command and / or the preview on HDMI display ?
Best Regards,
Khang
hello khang.l4es,
may I also know what’s your frame-rate?
you may refer to Topic 297458 to have (slightly) better G2G results by setting to performance mode.
Hi @JerryChang,
may I also know what’s your frame-rate?
We are currently testing 1080@30fps.
Update : same delay of ~200ms with 1080@60fps.
hello khang.l4es,
since it looks you have 2D scale (i.e. video converter) within your pipeline,
please give it a try to increase VIC clock by checking… VPI - Vision Programming Interface: Performance Benchmark
BTW,
we’ve only evaluate G2G latency with libargus pipeline.
Hi @JerryChang,
Thanks for your advice. We will try to increase the VIC clocks. Just one more question : Our camera outputs UYVY format, not RAW bayer format so the libargus is not relevant to our use-case, is that correct ?
that’s correct, please see-also Camera Architecture Stack for reference.
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