Technical Support Request: DP Configuration and 1-Lane HBR3 Link Training Issue on THOR T5000 Series

Dear Technical Support Team,

I am writing to seek your guidance regarding the DisplayPort (DP) configuration on the THOR T5000 series, as we have encountered an issue during our debugging phase.

Issue Description:
The DP interface of the T5000 fails to establish a stable connection with our display equipment when negotiating a DP 1-lane HBR3 configuration during Link Training. We have already verified and confirmed that the display downstream (Sink) device natively supports 1-lane input.

Our Questions:

  1. Verification Method: How can we verify within the T5000 source code whether 1-lane mode operation with a Sink device is fully supported? Could you guide us on which specific source files, drivers, or registers we should check to investigate this?
  2. Software/Code Reference: Is there a software code list, configuration matrix, or reference documentation available that details the supported DP lane counts and link rates (e.g., HBR3, HBR2) within the current SDK/firmware?

We look forward to your professional advice and any technical documentation or code pointers you can provide to help us resolve this issue.

Best regards

Hi,

Most of the function here is within the nvidia.ko and nvidia-modeset.ko which could be found in the public source tarball.

However, part of the driver like DCE is pre-built firmware which is not open source one.

thank you