Dear All,
Does anyone of you know if there is a flush command to invalidate the L2 Cache controller on Tegra K1 chip? Can I achieve that from a userspace program?
Thank you for your help.
Regards
Dear All,
Does anyone of you know if there is a flush command to invalidate the L2 Cache controller on Tegra K1 chip? Can I achieve that from a userspace program?
Thank you for your help.
Regards
Tegra K1 is full ARM cortex A15 process support, you may try to use the cortex A15 assembly command to control it.
But, why want to invalidate the L2 Cache controller on Tegra K1 chip?
Cheers