Tegra_K1_Memory_CharacterizationV1.0.1

rccola75 · May 3, 2016, 11:58pm

I have a custom board that uses DDR3 (Micron part that is different than the TK1 Jetson board’s SK Hynix part) but it’s supported and the memory characterization folder has the parameter file for that specific RAM. I just ran the Sanity Shmoo tests and every frequency passes except for 924 MHz and 792 MHz (fails all three voltage levels).

What should my next step be? I generated the baseline CFG files after adding in the board delays for my specific design. If those are fine, are there other parameters I can adjust to see if I can get the DDR3 working at the higher data rates? The Tegra K1 Memory Characterization App Note doesn’t have much information on what to do if the Sanity Shmoo tests fail.

Thanks.

Trumany · May 4, 2016, 5:14am

Can you tell the part name and upload the sanity result file and your CFG files here?

rccola75 · May 4, 2016, 5:06pm

The DDR3 part number that I am using is: Micron MT41K256M16HA-107:E
The parameter file within the memory characterization toolset I picked is: Micron_2GB_MT41K256M16HA_ddr3.par

I have posted the config file for the 924 MHz frequency and the respective sanity test results. I can also post the 792 MHz files if you want to see that too.

CFG file for the 924 MHz

CFG_924MHz.cfg

Do not edit. Generated by TK1_emc_reg_toolV5.0.18 V5.0.18. Command:

TK1_emc_reg_toolV5.0.18 -i …\param_files\Micron_2GB_MT41K256M16HA_ddr3.par 1.082251

-dram_board_cfg 14 -s emc_reg_swz.txt -is_mid_package 1 -round_trip_dly_ps 1032 -o CFG_924MHz.cfg

-b tBKV_RESULT\924MHz_emc_reg.txt -temp_derating 0

Parameter file: …\param_files\Micron_2GB_MT41K256M16HA_ddr3.par, tck = 1.08 ns (924.00 MHz)

bkv file: tBKV_RESULT\924MHz_emc_reg.txt

swz file: emc_reg_swz.txt

SDRAM[0].MemoryType = NvBootMemoryType_Ddr3;
SDRAM[0].PllMInputDivider = 0x00000001;
SDRAM[0].PllMFeedbackDivider = 0x0000004d;
SDRAM[0].PllMStableTime = 0x0000012c;
SDRAM[0].PllMSetupControl = 0x00000000;
SDRAM[0].PllMSelectDiv2 = 0x00000000;
SDRAM[0].PllMPDLshiftPh45 = 0x00000001;
SDRAM[0].PllMPDLshiftPh90 = 0x00000001;
SDRAM[0].PllMPDLshiftPh135 = 0x00000001;
SDRAM[0].PllMKCP = 0x00000000;
SDRAM[0].PllMKVCO = 0x00000000;
SDRAM[0].EmcBctSpare0 = 0x00000000;
SDRAM[0].EmcBctSpare1 = 0x00000000;
SDRAM[0].EmcBctSpare2 = 0x00000000;
SDRAM[0].EmcBctSpare3 = 0x00000000;
SDRAM[0].EmcBctSpare4 = 0x00000000;
SDRAM[0].EmcBctSpare5 = 0x00000000;
SDRAM[0].EmcBctSpare6 = 0x00000000;
SDRAM[0].EmcBctSpare7 = 0x00000000;
SDRAM[0].EmcBctSpare8 = 0x00000000;
SDRAM[0].EmcBctSpare9 = 0x00000000;
SDRAM[0].EmcBctSpare10 = 0x00000000;
SDRAM[0].EmcBctSpare11 = 0x00000000;
SDRAM[0].EmcClockSource = 0x80000000;
SDRAM[0].EmcAutoCalInterval = 0x001fffff;
SDRAM[0].EmcAutoCalConfig = 0xa1430000;
SDRAM[0].EmcAutoCalConfig2 = 0x00000000;
SDRAM[0].EmcAutoCalConfig3 = 0x00000000;
SDRAM[0].EmcAutoCalWait = 0x00000190;
SDRAM[0].EmcAdrCfg = 0x00000000;
SDRAM[0].EmcPinProgramWait = 0x00000001;
SDRAM[0].EmcPinExtraWait = 0x00000000;
SDRAM[0].EmcTimingControlWait = 0x00000000;
SDRAM[0].EmcRc = 0x0000002c;
SDRAM[0].EmcRfc = 0x000000ef;
SDRAM[0].EmcRfcSlr = 0x00000000;
SDRAM[0].EmcRas = 0x0000001f;
SDRAM[0].EmcRp = 0x0000000b;
SDRAM[0].EmcR2r = 0x00000000;
SDRAM[0].EmcW2w = 0x00000000;
SDRAM[0].EmcR2w = 0x0000000a;
SDRAM[0].EmcW2r = 0x0000000f;
SDRAM[0].EmcR2p = 0x00000005;
SDRAM[0].EmcW2p = 0x00000016;
SDRAM[0].EmcRdRcd = 0x0000000b;
SDRAM[0].EmcWrRcd = 0x0000000b;
SDRAM[0].EmcRrd = 0x00000005;
SDRAM[0].EmcRext = 0x00000002;
SDRAM[0].EmcWext = 0x00000000;
SDRAM[0].EmcWdv = 0x00000007;
SDRAM[0].EmcWdvMask = 0x00000007;
SDRAM[0].EmcQUse = 0x0000000e;
SDRAM[0].EmcQuseWidth = 0x00000002;
SDRAM[0].EmcIbdly = 0x00000000;
SDRAM[0].EmcEInput = 0x00000003;
SDRAM[0].EmcEInputDuration = 0x0000000f;
SDRAM[0].EmcPutermExtra = 0x000b0000;
SDRAM[0].EmcPutermWidth = 0x00000004;
SDRAM[0].EmcPutermAdj = 0x00000000;
SDRAM[0].EmcCdbCntl1 = 0x00000000;
SDRAM[0].EmcCdbCntl2 = 0x00000000;
SDRAM[0].EmcCdbCntl3 = 0x00000000;
SDRAM[0].EmcQRst = 0x00000002;
SDRAM[0].EmcQSafe = 0x00000016;
SDRAM[0].EmcRdv = 0x0000001b;
SDRAM[0].EmcRdvMask = 0x0000001d;
SDRAM[0].EmcQpop = 0x00000012;
SDRAM[0].EmcCtt = 0x00000000;
SDRAM[0].EmcCttDuration = 0x00000004;
SDRAM[0].EmcRefresh = 0x00001be7;
SDRAM[0].EmcBurstRefreshNum = 0x00000000;
SDRAM[0].EmcPreRefreshReqCnt = 0x000006f9;
SDRAM[0].EmcPdEx2Wr = 0x00000004;
SDRAM[0].EmcPdEx2Rd = 0x00000015;
SDRAM[0].EmcPChg2Pden = 0x00000001;
SDRAM[0].EmcAct2Pden = 0x00000000;
SDRAM[0].EmcAr2Pden = 0x000000e6;
SDRAM[0].EmcRw2Pden = 0x0000001b;
SDRAM[0].EmcTxsr = 0x000000fa;
SDRAM[0].EmcTxsrDll = 0x00000200;
SDRAM[0].EmcTcke = 0x00000006;
SDRAM[0].EmcTckesr = 0x00000007;
SDRAM[0].EmcTpd = 0x00000006;
SDRAM[0].EmcTfaw = 0x00000022;
SDRAM[0].EmcTrpab = 0x00000000;
SDRAM[0].EmcTClkStable = 0x0000000a;
SDRAM[0].EmcTClkStop = 0x0000000a;
SDRAM[0].EmcTRefBw = 0x00001c28;
SDRAM[0].EmcFbioCfg5 = 0x104ab898;
SDRAM[0].EmcFbioCfg6 = 0x00000000;
SDRAM[0].EmcFbioSpare = 0x00000000;
SDRAM[0].EmcCfgRsv = 0xff00ff00;
SDRAM[0].EmcMrs = 0x80000f15;
SDRAM[0].EmcEmrs = 0x80100002;
SDRAM[0].EmcEmrs2 = 0x80200020;
SDRAM[0].EmcEmrs3 = 0x80300000;
SDRAM[0].EmcMrw1 = 0x00000000;
SDRAM[0].EmcMrw2 = 0x00000000;
SDRAM[0].EmcMrw3 = 0x00000000;
SDRAM[0].EmcMrw4 = 0x00000000;
SDRAM[0].EmcMrwExtra = 0x00000000;
SDRAM[0].EmcWarmBootMrwExtra = 0x00000000;
SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000000;
SDRAM[0].EmcExtraModeRegWriteEnable = 0x00000000;
SDRAM[0].EmcMrwResetCommand = 0x00000000;
SDRAM[0].EmcMrwResetNInitWait = 0x00000000;
SDRAM[0].EmcMrsWaitCnt = 0x00ce000c;
SDRAM[0].EmcMrsWaitCnt2 = 0x00ce000c;
SDRAM[0].EmcCfg = 0x73300000;
SDRAM[0].EmcCfg2 = 0x0000089d;
SDRAM[0].EmcCfgPipe = 0x00004080;
SDRAM[0].EmcDbg = 0x01000c00;
SDRAM[0].EmcCmdQ = 0x10004408;
SDRAM[0].EmcMc2EmcQ = 0x06000404;
SDRAM[0].EmcDynSelfRefControl = 0x800037ea;
SDRAM[0].AhbArbitrationXbarCtrlMemInitDone = 0x00000001;
SDRAM[0].EmcCfgDigDll = 0xe00400b1;
SDRAM[0].EmcCfgDigDllPeriod = 0x00008000;
SDRAM[0].EmcDevSelect = 0x00000002;
SDRAM[0].EmcSelDpdCtrl = 0x00040000;
SDRAM[0].EmcDllXformDqs0 = 0x0000000a;
SDRAM[0].EmcDllXformDqs1 = 0x0000000a;
SDRAM[0].EmcDllXformDqs2 = 0x0000000a;
SDRAM[0].EmcDllXformDqs3 = 0x0000000a;
SDRAM[0].EmcDllXformDqs4 = 0x0000000a;
SDRAM[0].EmcDllXformDqs5 = 0x0000000a;
SDRAM[0].EmcDllXformDqs6 = 0x0000000a;
SDRAM[0].EmcDllXformDqs7 = 0x0000000a;
SDRAM[0].EmcDllXformDqs8 = 0x0000000a;
SDRAM[0].EmcDllXformDqs9 = 0x0000000a;
SDRAM[0].EmcDllXformDqs10 = 0x0000000a;
SDRAM[0].EmcDllXformDqs11 = 0x0000000a;
SDRAM[0].EmcDllXformDqs12 = 0x0000000a;
SDRAM[0].EmcDllXformDqs13 = 0x0000000a;
SDRAM[0].EmcDllXformDqs14 = 0x0000000a;
SDRAM[0].EmcDllXformDqs15 = 0x0000000a;
SDRAM[0].EmcDllXformQUse0 = 0x00000000;
SDRAM[0].EmcDllXformQUse1 = 0x00000000;
SDRAM[0].EmcDllXformQUse2 = 0x00000000;
SDRAM[0].EmcDllXformQUse3 = 0x00000000;
SDRAM[0].EmcDllXformQUse4 = 0x00000000;
SDRAM[0].EmcDllXformQUse5 = 0x00000000;
SDRAM[0].EmcDllXformQUse6 = 0x00000000;
SDRAM[0].EmcDllXformQUse7 = 0x00000000;
SDRAM[0].EmcDllXformAddr0 = 0x0001c000;
SDRAM[0].EmcDllXformAddr1 = 0x0001c000;
SDRAM[0].EmcDllXformAddr2 = 0x00000000;
SDRAM[0].EmcDllXformAddr3 = 0x0001c000;
SDRAM[0].EmcDllXformAddr4 = 0x0001c000;
SDRAM[0].EmcDllXformAddr5 = 0x00000000;
SDRAM[0].EmcDllXformQUse8 = 0x00000000;
SDRAM[0].EmcDllXformQUse9 = 0x00000000;
SDRAM[0].EmcDllXformQUse10 = 0x00000000;
SDRAM[0].EmcDllXformQUse11 = 0x00000000;
SDRAM[0].EmcDllXformQUse12 = 0x00000000;
SDRAM[0].EmcDllXformQUse13 = 0x00000000;
SDRAM[0].EmcDllXformQUse14 = 0x00000000;
SDRAM[0].EmcDllXformQUse15 = 0x00000000;
SDRAM[0].EmcDliTrimTxDqs0 = 0x00000012;
SDRAM[0].EmcDliTrimTxDqs1 = 0x00000015;
SDRAM[0].EmcDliTrimTxDqs2 = 0x00000016;
SDRAM[0].EmcDliTrimTxDqs3 = 0x00000014;
SDRAM[0].EmcDliTrimTxDqs4 = 0x00000015;
SDRAM[0].EmcDliTrimTxDqs5 = 0x00000016;
SDRAM[0].EmcDliTrimTxDqs6 = 0x00000015;
SDRAM[0].EmcDliTrimTxDqs7 = 0x00000013;
SDRAM[0].EmcDliTrimTxDqs8 = 0x00000012;
SDRAM[0].EmcDliTrimTxDqs9 = 0x00000015;
SDRAM[0].EmcDliTrimTxDqs10 = 0x00000016;
SDRAM[0].EmcDliTrimTxDqs11 = 0x00000014;
SDRAM[0].EmcDliTrimTxDqs12 = 0x00000015;
SDRAM[0].EmcDliTrimTxDqs13 = 0x00000016;
SDRAM[0].EmcDliTrimTxDqs14 = 0x00000015;
SDRAM[0].EmcDliTrimTxDqs15 = 0x00000013;
SDRAM[0].EmcDllXformDq0 = 0x0000000e;
SDRAM[0].EmcDllXformDq1 = 0x0000000e;
SDRAM[0].EmcDllXformDq2 = 0x0000000e;
SDRAM[0].EmcDllXformDq3 = 0x0000000e;
SDRAM[0].EmcDllXformDq4 = 0x0000000d;
SDRAM[0].EmcDllXformDq5 = 0x0000000e;
SDRAM[0].EmcDllXformDq6 = 0x0000000d;
SDRAM[0].EmcDllXformDq7 = 0x0000000d;
SDRAM[0].WarmBootWait = 0x00000002;
SDRAM[0].EmcCttTermCtrl = 0x00000802;
SDRAM[0].EmcOdtWrite = 0x00000000;
SDRAM[0].EmcOdtRead = 0x00000000;
SDRAM[0].EmcZcalInterval = 0x00020000;
SDRAM[0].EmcZcalWaitCnt = 0x0000004c;
SDRAM[0].EmcZcalMrwCmd = 0x80000000;
SDRAM[0].EmcMrsResetDll = 0x00000000;
SDRAM[0].EmcZcalInitDev0 = 0x80000011;
SDRAM[0].EmcZcalInitDev1 = 0x00000000;
SDRAM[0].EmcZcalInitWait = 0x00000001;
SDRAM[0].EmcZcalWarmColdBootEnables = 0x00000003;
SDRAM[0].EmcMrwLpddr2ZcalWarmBoot = 0x040a00ab;
SDRAM[0].EmcZqCalDdr3WarmBoot = 0x00000000;
SDRAM[0].EmcZcalWarmBootWait = 0x00000001;
SDRAM[0].EmcMrsWarmBootEnable = 0x00000001;
SDRAM[0].EmcMrsResetDllWait = 0x00000000;
SDRAM[0].EmcMrsExtra = 0x80000f15;
SDRAM[0].EmcWarmBootMrsExtra = 0x80100002;
SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000;
SDRAM[0].EmcMrsDdr2DllReset = 0x00000000;
SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000;
SDRAM[0].EmcDdr2Wait = 0x00000000;
SDRAM[0].EmcClkenOverride = 0x00000000;
SDRAM[0].McDisExtraSnapLevels = 0x00000000;
SDRAM[0].EmcExtraRefreshNum = 0x00000002;
SDRAM[0].EmcClkenOverrideAllWarmBoot = 0x00000000;
SDRAM[0].McClkenOverrideAllWarmBoot = 0x00000000;
SDRAM[0].EmcCfgDigDllPeriodWarmBoot = 0x00000003;
SDRAM[0].PmcVddpSel = 0x00000002;
SDRAM[0].PmcVddpSelWait = 0x00000002;
SDRAM[0].PmcDdrPwr = 0x00000003;
SDRAM[0].PmcDdrCfg = 0x00002002;
SDRAM[0].PmcIoDpd3Req = 0x4fff2f97;
SDRAM[0].PmcIoDpd3ReqWait = 0x00000000;
SDRAM[0].PmcRegShort = 0x00000000;
SDRAM[0].PmcNoIoPower = 0x00000000;
SDRAM[0].PmcPorDpdCtrlWait = 0x00000000;
SDRAM[0].EmcXm2CmdPadCtrl = 0x100002a0;
SDRAM[0].EmcXm2CmdPadCtrl2 = 0x770c0000;
SDRAM[0].EmcXm2CmdPadCtrl3 = 0x050c0000;
SDRAM[0].EmcXm2CmdPadCtrl4 = 0x00000000;
SDRAM[0].EmcXm2CmdPadCtrl5 = 0x00111111;
SDRAM[0].EmcXm2DqsPadCtrl = 0x770c1414;
SDRAM[0].EmcXm2DqsPadCtrl2 = 0x0120113d;
SDRAM[0].EmcXm2DqsPadCtrl3 = 0x5d75d720;
SDRAM[0].EmcXm2DqsPadCtrl4 = 0x00514514;
SDRAM[0].EmcXm2DqsPadCtrl5 = 0x00514514;
SDRAM[0].EmcXm2DqsPadCtrl6 = 0x5d75d700;
SDRAM[0].EmcXm2DqPadCtrl = 0x770c2990;
SDRAM[0].EmcXm2DqPadCtrl2 = 0x00000000;
SDRAM[0].EmcXm2DqPadCtrl3 = 0x00000000;
SDRAM[0].EmcXm2ClkPadCtrl = 0x77ffc085;
SDRAM[0].EmcXm2ClkPadCtrl2 = 0x00000909;
SDRAM[0].EmcXm2CompPadCtrl = 0x81f1f108;
SDRAM[0].EmcXm2VttGenPadCtrl = 0x07070004;
SDRAM[0].EmcXm2VttGenPadCtrl2 = 0x00000000;
SDRAM[0].EmcXm2VttGenPadCtrl3 = 0x016eeeee;
SDRAM[0].EmcAcpdControl = 0x00000000;
SDRAM[0].EmcSwizzleRank0ByteCfg = 0x00002031;
SDRAM[0].EmcSwizzleRank0Byte0 = 0x25301476;
SDRAM[0].EmcSwizzleRank0Byte1 = 0x24530617;
SDRAM[0].EmcSwizzleRank0Byte2 = 0x74130652;
SDRAM[0].EmcSwizzleRank0Byte3 = 0x24563071;
SDRAM[0].EmcSwizzleRank1ByteCfg = 0x00002031;
SDRAM[0].EmcSwizzleRank1Byte0 = 0x62043517;
SDRAM[0].EmcSwizzleRank1Byte1 = 0x36147205;
SDRAM[0].EmcSwizzleRank1Byte2 = 0x73541260;
SDRAM[0].EmcSwizzleRank1Byte3 = 0x51743602;
SDRAM[0].EmcDsrVttgenDrv = 0x0606003f;
SDRAM[0].EmcTxdsrvttgen = 0x00000000;
SDRAM[0].EmcBgbiasCtl0 = 0x00000000;
SDRAM[0].McEmemAdrCfg = 0x00000000;
SDRAM[0].McEmemAdrCfgDev0 = 0x00080303;
SDRAM[0].McEmemAdrCfgDev1 = 0x00080303;
SDRAM[0].McEmemAdrCfgBankMask0 = 0x00001248;
SDRAM[0].McEmemAdrCfgBankMask1 = 0x00002490;
SDRAM[0].McEmemAdrCfgBankMask2 = 0x00000920;
SDRAM[0].McEmemAdrCfgBankSwizzle3 = 0x00000001;
SDRAM[0].McEmemCfg = 0x00000800;
SDRAM[0].McEmemArbCfg = 0x0e00000d;
SDRAM[0].McEmemArbOutstandingReq = 0x80000040;
SDRAM[0].McEmemArbTimingRcd = 0x00000005;
SDRAM[0].McEmemArbTimingRp = 0x00000006;
SDRAM[0].McEmemArbTimingRc = 0x00000016;
SDRAM[0].McEmemArbTimingRas = 0x0000000f;
SDRAM[0].McEmemArbTimingFaw = 0x00000011;
SDRAM[0].McEmemArbTimingRrd = 0x00000003;
SDRAM[0].McEmemArbTimingRap2Pre = 0x00000004;
SDRAM[0].McEmemArbTimingWap2Pre = 0x0000000e;
SDRAM[0].McEmemArbTimingR2R = 0x00000002;
SDRAM[0].McEmemArbTimingW2W = 0x00000002;
SDRAM[0].McEmemArbTimingR2W = 0x00000007;
SDRAM[0].McEmemArbTimingW2R = 0x00000009;
SDRAM[0].McEmemArbDaTurns = 0x09070202;
SDRAM[0].McEmemArbDaCovers = 0x001a1016;
SDRAM[0].McEmemArbMisc0 = 0x734e2a17;
SDRAM[0].McEmemArbMisc1 = 0x70000f02;
SDRAM[0].McEmemArbRing1Throttle = 0x001f0000;
SDRAM[0].McEmemArbOverride = 0x10000000;
SDRAM[0].McEmemArbOverride1 = 0x00000000;
SDRAM[0].McEmemArbRsv = 0xff00ff00;
SDRAM[0].McClkenOverride = 0x00000000;
SDRAM[0].McStatControl = 0x00000000;
SDRAM[0].McDisplaySnapRing = 0x00000003;
SDRAM[0].McVideoProtectBom = 0xfff00000;
SDRAM[0].McVideoProtectBomAdrHi = 0x00000000;
SDRAM[0].McVideoProtectSizeMb = 0x00000000;
SDRAM[0].McVideoProtectVprOverride = 0xe4bac743;
SDRAM[0].McVideoProtectVprOverride1 = 0x00000013;
SDRAM[0].McVideoProtectGpuOverride0 = 0x00000000;
SDRAM[0].McVideoProtectGpuOverride1 = 0x00000000;
SDRAM[0].McSecCarveoutBom = 0xfff00000;
SDRAM[0].McSecCarveoutAdrHi = 0x00000000;
SDRAM[0].McSecCarveoutSizeMb = 0x00000000;
SDRAM[0].McVideoProtectWriteAccess = 0x00000000;
SDRAM[0].McSecCarveoutProtectWriteAccess = 0x00000000;
SDRAM[0].EmcCaTrainingEnable = 0x00000000;
SDRAM[0].EmcCaTrainingTimingCntl1 = 0x1f7df7df;
SDRAM[0].EmcCaTrainingTimingCntl2 = 0x0000001f;
SDRAM[0].SwizzleRankByteEncode = 0x0000000e;
SDRAM[0].BootRomPatchControl = 0x00000000;
SDRAM[0].BootRomPatchData = 0x00000000;
SDRAM[0].McMtsCarveoutBom = 0xfff00000;
SDRAM[0].McMtsCarveoutAdrHi = 0x00000000;
SDRAM[0].McMtsCarveoutSizeMb = 0x00000000;
SDRAM[0].McMtsCarveoutRegCtrl = 0x00000000;
#@ MC_MLL_MPCORER_PTSA_RATE {0x7001944c} = 0x00000017;
#@ MC_PTSA_GRANT_DECREMENT {0x70019960} = 0x000001bb;
#@ MC_LATENCY_ALLOWANCE_XUSB_0 {0x7001937c} = 0x006e0038;
#@ MC_LATENCY_ALLOWANCE_XUSB_1 {0x70019380} = 0x006e0038;
#@ MC_LATENCY_ALLOWANCE_TSEC_0 {0x70019390} = 0x006e003c;
#@ MC_LATENCY_ALLOWANCE_SDMMCA_0 {0x700193b8} = 0x006e0090;
#@ MC_LATENCY_ALLOWANCE_SDMMCAA_0 {0x700193bc} = 0x006e0041;
#@ MC_LATENCY_ALLOWANCE_SDMMC_0 {0x700193c0} = 0x006e0090;
#@ MC_LATENCY_ALLOWANCE_SDMMCAB_0 {0x700193c4} = 0x006e0041;
#@ MC_LATENCY_ALLOWANCE_PPCS_0 {0x70019344} = 0x00270049;
#@ MC_LATENCY_ALLOWANCE_PPCS_1 {0x70019348} = 0x006e0080;
#@ MC_LATENCY_ALLOWANCE_MPCORE_0 {0x70019320} = 0x006e0004;
#@ MC_LATENCY_ALLOWANCE_MPCORELP_0 {0x70019324} = 0x006e0004;
#@ MC_LATENCY_ALLOWANCE_HC_0 {0x70019310} = 0x00080016;
#@ MC_LATENCY_ALLOWANCE_HC_1 {0x70019314} = 0x0000006e;
#@ MC_LATENCY_ALLOWANCE_AVPC_0 {0x700192e4} = 0x006e0004;
#@ MC_LATENCY_ALLOWANCE_GPU_0 {0x700193ac} = 0x006e0019;
#@ MC_LATENCY_ALLOWANCE_MSENC_0 {0x70019328} = 0x006e0018;
#@ MC_LATENCY_ALLOWANCE_HDA_0 {0x70019318} = 0x006e0024;
#@ MC_LATENCY_ALLOWANCE_VIC_0 {0x70019394} = 0x006e001b;
#@ MC_LATENCY_ALLOWANCE_VI2_0 {0x70019398} = 0x0000006e;
#@ MC_LATENCY_ALLOWANCE_ISP2_0 {0x70019370} = 0x00000036;
#@ MC_LATENCY_ALLOWANCE_ISP2_1 {0x70019374} = 0x006e006e;
#@ MC_LATENCY_ALLOWANCE_ISP2B_0 {0x70019384} = 0x00000036;
#@ MC_LATENCY_ALLOWANCE_ISP2B_1 {0x70019388} = 0x006e006e;
#@ MC_LATENCY_ALLOWANCE_VDE_0 {0x70019354} = 0x00d400ff;
#@ MC_LATENCY_ALLOWANCE_VDE_1 {0x70019358} = 0x00510029;
#@ MC_LATENCY_ALLOWANCE_VDE_2 {0x7001935c} = 0x006e006e;
#@ MC_LATENCY_ALLOWANCE_VDE_3 {0x70019360} = 0x006e006e;
#@ MC_LATENCY_ALLOWANCE_SATA_0 {0x70019350} = 0x006e0065;
#@ MC_LATENCY_ALLOWANCE_AFI_0 {0x700192e0} = 0x006e001c;

I believe the sanity shmoo tests run the 924 MHz three times with three different voltage settings. I only listed the log and .out files for one of the three tests.

Sanity test results for 924 MHz
PLLM972##Rdv##c980i1300h1000.out
Version(“V1.0.0”);
CFGVersion(“NoCfgVersion”);
CFG(“extras\config_files\CFG_924MHz.cfg”);
DefName(“PLLM972##Rdv##c980i1300h1000”);
DefStartTime(“Wed May 04 09:49:19 2016”);
DefEndTime(“Wed May 04 09:49:33 2016”);
SetDimension(1);

DefAxis(0, “Rdv”, 27, DefValues([‘27’] ));

DefResult(FindState([0]), 1); # 1

972PLLM_c980i1300h1000_Rdv.log.txt

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/ //\ | () || |) || || || // //\ / _/// /_// _\ \
/ / _/ |.__/ |||| _|/ /_//_,’ _/
Copyright 2008 by NVIDIA Corporation. All rights reserved. All
information contained herein is proprietary and confidential to NVIDIA
Corporation. Any use, reproduction, or disclosure without the written
permission of NVIDIA Corporation is prohibited.

Intermediate results printed to the .out file###

Setting PLLM972##Rdv##c980i1300h1000 State:
Rdv: 27
spawning nvhost: [‘C:\Tegra_K1_Memory_CharacterizationV1.0.1\nvhost.exe’, ‘-C’, ‘50000’, ‘–avp’, ‘tests\debug_nvt124_rvds_armv4\wfblit_lite.axf’, ‘–sdram’, ‘c:\users\ross\appdata\local\temp\tmpvwpe4dw’, ‘-t’, ‘30’, ‘–port’, ‘None’, ‘–chip’, ‘t124’, ‘–skip-reset’, ‘–’, ‘-fc’, ‘0,50,0’, ‘-vic’, ‘312’, ‘-reg’, ‘1’, ‘-log’, ‘0’, ‘-m’, ‘0xbf800000’, ‘-z’, ‘16’, ‘-s’, ‘0xffffffff’, ‘-n’, ‘972##Rdv##c980i1300h1000’, ‘-b’, ‘i’, ‘–’]
nvhost: ========================================
nvhost: Found --chip parameter
Error ParseFieldName: (null)
Error processing statement: SDRAM[0].PllMSetupControl=0x00000000
Error ParseFieldName: (null)
Error processing statement: SDRAM[0].EmcBctSpare1=0x00000000
nvhost: …success! Found t124
nvhost: ========================================
nvblserver: Loading “tests\debug_nvt124_rvds_armv4\wfblit_lite.axg” via usb:…
Done.
WARNING: Ignoring auto-detect due to --chip parameter
clk_src_addr[clk][1]

(‘VIC’, ‘PllC3’, 0, 5)
clk_src_addr[clk][1]

(‘HOST1X’, ‘PllC2’, 0, 1)
base_value: 0x6000602c, src: PllP0, n:0x 1, m:0x0

base_value: 0x40106801, m: 0x 1, n:0x68, p:0x1

_board=PM375
rail=VDD_CORE
pmu_type=AMS
pmu_type_ifc=i2c4
pmu_ping_dev= 64
chip=t124

…Now connected to target using usb

Hit a Breakpoint. Use shrun to continue.

Enter command:
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Enter command:
Enter command: nvhost: *(60006678) = 0x00000000

Enter command:
Enter command: nvhost: *(60006180) = 0x00000000

Enter command:
Enter command: nvhost: *(6000602C) = 0x00000000

Enter command:
Enter command: nvhost: *(60006028) = 0x20000040

Enter command:
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Enter command:
Enter command:
Enter command: nvhost: *(60006008) = 0xefddf326

Enter command:
Enter command: nvhost: *(60006008) = 0xefddf326

Enter command:
Enter command:
Enter command: nvhost: *(60006014) = 0x000004c0

Enter command:
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Enter command:
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Enter command:
Enter command:
Enter command:
Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000000

Enter command:
Enter command:
Enter command:
Enter command:
Enter command:
Enter command:
Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000current vcore= 1100
_board=PM375
rail=VDD_CORE
pmu_type=AMS
pmu_type_ifc=i2c4
pmu_ping_dev= 64
chip=t124
range_check is done
I2C write: dev(0x40), addr(0x1), data(0x28)
D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000000

Enter command: nvhost: *(7000D010) = 0x00000032

Enter command:
Enter command:
Enter command: nvhost: *(60006008) = 0xefdd7326

Enter command:
Enter command: nvhost: *(60006008) = 0xefddf326

Enter command:
Enter command:
Enter command: nvhost: *(60006014) = 0x000084c0

Enter command:
Enter command:
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Enter command:
Enter command:
Enter command:
Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000000

Enter command:
Enter command:
Enter command:
Enter command:
Enter command:
Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D0_board=PM375
rail=VDD_CORE
pmu_type=AMS
pmu_type_ifc=i2c4
pmu_ping_dev= 64
chip=t124
1C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000000

Enter command:
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Enter command:
Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000000

Enter command: nvhost: *(7000D010) = 0x00000028

Enter command:
Enter command:
Enter command: nvhost: *(60006008) = 0xefdd7326

Enter command:
Enter command: nvhost: *(60006008) = 0xefddf326

Enter command:
Enter command:
Enter command: nvhost: *(60006014) = 0x000084c0

Enter command:
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Enter command:
Enter command:
Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvrange_check is done
I2C write: dev(0x40), addr(0x1), data(0x26)
_board=PM375
rail=VDDIO_DDR
pmu_type=AMS
pmu_type_ifc=i2c4
pmu_ping_dev= 64
chip=t124
host: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000000

Enter command:
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Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000000

Enter command:
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Enter command:
Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000000

Enter command: nvhost: *(7000D010) = 0x00000026

Enter command:
Enter command:
Enter command: nvhost: *(60006008) = 0xefdd7326

Enter command:
Enter command: nvhost: *(60006008) = 0xefddf326

Enter command:
Enter command:
Enter command: nvhost: *(60006014) = 0x000084c0

Enter command:
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Enter command:
Enter command:
Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhostI2C write: dev(0x40), addr(0x2), data(0x38)
_board=PM375
rail=VDD_DDR_HS
pmu_type=AMS
pmu_type_ifc=i2c4
pmu_ping_dev= 64
chip=t124
: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000000

Enter command:
Enter command:
Enter command:
Enter command:
Enter command:
Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000000

Enter command:
Enter command:
Enter command:
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Enter command:
Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000000

Enter command: nvhost: *(7000D010) = 0x00000038

Enter command:
Enter command:
Enter command: nvhost: *(60006008) = 0xefdd7326

Enter command:
Enter command: nvhost: *(60006008) = 0xefddf326

Enter command:
Enter command:
Enter command: nvhost: *(60006014) = 0x000084c0

Enter command:
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Enter command:
Enter command:
Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(range_check is done
I2C write: dev(0x40), addr(0x10), data(0x8)
_board=PM375
rail=VDD_RTC
pmu_type=AMS
pmu_type_ifc=i2c4
pmu_ping_dev= 64
chip=t124
7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000000

Enter command:
Enter command:
Enter command:
Enter command:
Enter command:
Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000000

Enter command:
Enter command:
Enter command:
Enter command:
Enter command:
Enter command:
Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000000

Enter command: nvhost: *(7000D010) = 0x00000008

Enter command:
Enter command:
Enter command: nvhost: *(60006008) = 0xefdd7326

Enter command:
Enter command: nvhost: *(60006008) = 0xefddf326

Enter command:
Enter command:
Enter command: nvhost: *(60006014) = 0x000084c0

Enter command:
Enter command:
Enter command:
Enter command:
Enter command:
Enter command:
Enter command:
Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000range_check is done
I2C write: dev(0x40), addr(0x13), data(0x13)
D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000000

Enter command:
Enter command:
Enter command:
Enter command:
Enter command:
Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000000

Enter command:
Enter command:
Enter command:
Enter command:
Enter command:
Enter command:
Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000100

Enter command: nvhost: *(7000D01C) = 0x00000000

Enter command: nvhost: *(7000D010) = 0x00000013

Enter command: target_stdout: enter NvTestMain V01
target_stdout: Processing argument 1: -fc
target_stdout: Processing argument 3: -vic
target_stdout: -vic 312
target_stdout: Processing argument 5: -reg
target_stdout: Processing argument 7: -log
target_stdout: Processing argument 9: -m
target_stdout: setting offset of the tested memory to 0xbf800000
target_stdout: Processing argument 11: -z
target_stdout: Processing argument 13: -s
target_stdout: Processing argument 15: -n
target_stdout: Processing argument 17: -b
target_stdout: The number of pattern: 16, box num 30
target_stdout: box width/height 2048 128 Surface width/height: 2048 3840
target_stdout: init sdram
target_stdout: Memory size = 0x00000400
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM Subtest Start
target_stdout: SDRAM Subtest PASS
target_stdout: SDRAM test PASSED
target_stdout: Breaking after sdram init…
Hit a Breakpoint. Use shrun to continue.
nvhost: OK

Enter command: target_stdout: Register Engine
target_stdout: Find Engine id: 0x5d
target_stdout: search id: 0x5e
target_stdout: search id: 0x5d
target_stdout: Engine ID: 0x5d found
target_stdout:
target_stdout:
target_stdout: -------Start: sanity in Register based mode
target_stdout: Board: E1186
target_stdout: top 0xfffffffe
target_stdout: initBLit
target_stdout: Init Vic Frequency Ctrl
target_stdout: Skipping pllc programming
target_stdout: SOURCE_VIC reg: 0xa0000000 VIC source: PLLC3_OUT0
target_stdout: ENB X reg: 0x01040000 vic clock: enable
target_stdout: ENB L reg: 0x90400130 host1x clock: enable
target_stdout: AllocSyncpt
target_stdout: channe base:0x50000000 sync base:0x2100, syncpt0 base:0xf80
target_stdout: prep surface
target_stdout: DRAM addr range: 0x80000000 - 0xfffffffe
target_stdout: DRAM footprint: 0xbf800000 - 0xc0700000 (wfblit)
target_stdout: DRAM used: 15.0MB (blit uses 15.0MB)
target_stdout: == Range 0 in 1: 0xbf800000 - 0xc06fffff
target_stdout: wfblitcore
target_stdout: Patterns loaded. starting blits.
target_stdout: PMC aperture space
target_stdout: PMC_PLLP_WB0_OVERRIDE reg: 0x00000422
target_stdout: PLLM_WB0_OVERRIDE_FREQ reg: 0x0000010c
target_stdout: PMC:PLLP: override: disable
target_stdout: PMC:PLLM: override: disable (12,1)
target_stdout:
target_stdout: CAR aperture space
target_stdout: PLLM: 972MHz(1,81,0), PLL_BASE: 0x4c005101,
target_stdout: PLLP: override: enable
target_stdout: PLLP: 432MHz(2,72,0), PLL_BASE: 0x58004802,
target_stdout: PLLC: 624MHz(1,104,1), PLL_BASE: 0x48106801,
target_stdout: EMC source clk: PLLM_UD, SOURCE_EMC: 0x80000000
target_stdout: (ref=12MHz)
target_stdout: EMC freq: 972MHz
target_stdout: start box. loops: 0x0 numbox: 30
target_stdout: end box
target_stdout: Programming done. Waiting test done.
target_stdout: ----------------------
target_stdout: T124 Memory Statistics
target_stdout: ----------------------
target_stdout: Stats (
target_stdout:
target_stdout: Channel 0:
target_stdout: DEV 0:
target_stdout: .RD (
target_stdout: .RD8 (
target_stdout: .WR (
target_stdout: .WR8 (
target_stdout: .ACT (
target_stdout: .REF (
target_stdout: .SREF (
target_stdout: .E1CA (
target_stdout: .E1SA (
target_stdout: .E0CA (
target_stdout: .E0SA (
target_stdout: .E1CN (
target_stdout: .E1SN (
target_stdout: .E0CN (
target_stdout: .E0SN (
target_stdout:
target_stdout: DEV 1:
target_stdout: .RD (
target_stdout: .RD8 (
target_stdout: .WR (
target_stdout: .WR8 (
target_stdout: .ACT (
target_stdout: .REF (
target_stdout: .SREF (
target_stdout: .E1CA (
target_stdout: .E1SA (
target_stdout: .E0CA (
target_stdout: .E0SA (
target_stdout: .E1CN (
target_stdout: .E1SN (
target_stdout: .E0CN (
target_stdout: .E0SN (
target_stdout:
target_stdout: Channel 0 Bandwidth(avg): 3822MB/s, or 49% (assuming static 972MHz)
target_stdout: =====================
target_stdout: End Memory Statistics
target_stdout: =====================
target_stdout: Blit done. The blit took 0.0 seconds
target_stdout: Read back check. Mask = 0xffffffff
target_stdout:
target_stdout: index: 0x0 box/x/y: 2/12/0 Expected:0x0 Actual:0x2
target_stdout: Physaddr: 0xbf900030
target_stdout: Default Pattern. Init Pattern format: WalkingZeros, pattern index: 0x2.
target_stdout: Current Pattern format: SuperZeroOne, pattern index: 0x3.
target_stdout: Physical Location. rank 0x1, channel(sp): 0x0
target_stdout:
target_stdout: index: 0x1 box/x/y: 2/220/0 Expected:0x0 Actual:0x10002
target_stdout: Physaddr: 0xbf900370
target_stdout: Default Pattern. Init Pattern format: WalkingZeros, pattern index: 0x2.
target_stdout: Current Pattern format: SuperZeroOne, pattern index: 0x3.
target_stdout: Physical Location. rank 0x1, channel(sp): 0x0
target_stdout:
target_stdout: index: 0x2 box/x/y: 2/268/0 Expected:0x0 Actual:0x2
target_stdout: Physaddr: 0xbf900430
target_stdout: Default Pattern. Init Pattern format: WalkingZeros, pattern index: 0x2.
target_stdout: Current Pattern format: SuperZeroOne, pattern index: 0x3.
target_stdout: Physical Location. rank 0x1, channel(sp): 0x0
target_stdout:
target_stdout: index: 0x3 box/x/y: 2/635/0 Expected:0x0 Actual:0x20
target_stdout: Physaddr: 0xbf9009ec
target_stdout: Default Pattern. Init Pattern format: WalkingZeros, pattern index: 0x2.
target_stdout: Current Pattern format: SuperZeroOne, pattern index: 0x3.
target_stdout: Physical Location. rank 0x1, channel(sp): 0x0
target_stdout:
target_stdout: index: 0x4 box/x/y: 2/707/0 Expected:0x0 Actual:0x10000
target_stdout: Physaddr: 0xbf900b0c
target_stdout: Default Pattern. Init Pattern format: WalkingZeros, pattern index: 0x2.
target_stdout: Current Pattern format: SuperZeroOne, pattern index: 0x3.
target_stdout: Physical Location. rank 0x1, channel(sp): 0x0
target_stdout:
target_stdout: index: 0x5 box/x/y: 2/67/1 Expected:0x0 Actual:0x10000
target_stdout: Physaddr: 0xbf90110c
target_stdout: Default Pattern. Init Pattern format: WalkingZeros, pattern index: 0x2.
target_stdout: Current Pattern format: SuperZeroOne, pattern index: 0x3.
target_stdout: Physical Location. rank 0x1, channel(sp): 0x0
target_stdout:
target_stdout: index: 0x6 box/x/y: 2/267/1 Expected:0x0 Actual:0x10000
target_stdout: Physaddr: 0xbf90142c
target_stdout: Default Pattern. Init Pattern format: WalkingZeros, pattern index: 0x2.
target_stdout: Current Pattern format: SuperZeroOne, pattern index: 0x3.
target_stdout: Physical Location. rank 0x1, channel(sp): 0x0
target_stdout:
target_stdout: index: 0x7 box/x/y: 2/347/1 Expected:0x0 Actual:0xa0
target_stdout: Physaddr: 0xbf90156c
target_stdout: Default Pattern. Init Pattern format: WalkingZeros, pattern index: 0x2.
target_stdout: Current Pattern format: SuperZeroOne, pattern index: 0x3.
target_stdout: Physical Location. rank 0x1, channel(sp): 0x0
target_stdout:
target_stdout: index: 0x8 box/x/y: 2/397/1 Expected:0x0 Actual:0x10000
target_stdout: Physaddr: 0xbf901634
target_stdout: Default Pattern. Init Pattern format: WalkingZeros, pattern index: 0x2.
target_stdout: Current Pattern format: SuperZeroOne, pattern index: 0x3.
target_stdout: Physical Location. rank 0x1, channel(sp): 0x0
target_stdout:
target_stdout: index: 0x9 box/x/y: 2/403/1 Expected:0x0 Actual:0xa0
target_stdout: Physaddr: 0xbf90164c
target_stdout: Default Pattern. Init Pattern format: WalkingZeros, pattern index: 0x2.
target_stdout: Current Pattern format: SuperZeroOne, pattern index: 0x3.
target_stdout: Physical Location. rank 0x1, channel(sp): 0x0
target_stdout: wfblitcore done!
target_stdout: WfBlitCoreRun() returned 524291.
target_stdout: [fail: SubtestWfblit at /share/git-dev/dev-t124-bringup/tests/diags/mods/tests/wfblit_lite/wfblit.c:670]
target_stdout: printing errors!
target_stdout: Miscs info:
target_stdout: DRAM WIDTH: X64
target_stdout: DRAM TYPE: DDR3
target_stdout: DRAM DATA SWZL: LOWER
target_stdout:
target_stdout: Error info:
target_stdout: Bit FlipsToOne FlipsToZero
target_stdout:
target_stdout: Channel: 0x0
target_stdout: 00000000 NOERR NOERR
target_stdout: 00000001 NOERR NOERR
target_stdout: 00000002 NOERR NOERR
target_stdout: 00000003 NOERR NOERR
target_stdout: 00000004 NOERR NOERR
target_stdout: 00000005 NOERR NOERR
target_stdout: 00000006 NOERR NOERR
target_stdout: 00000007 NOERR NOERR
target_stdout: 00000008 NOERR NOERR
target_stdout: 00000009 NOERR NOERR
target_stdout: 00000010 NOERR NOERR
target_stdout: 00000011 NOERR NOERR
target_stdout: 00000012 NOERR NOERR
target_stdout: 00000013 NOERR NOERR
target_stdout: 00000014 NOERR NOERR
target_stdout: 00000015 NOERR NOERR
target_stdout: 00000016 NOERR NOERR
target_stdout: 00000017 NOERR NOERR
target_stdout: 00000018 NOERR NOERR
target_stdout:

rccola75 · May 4, 2016, 5:08pm

I don’t think the whole log file got posted so here it is again: