Tegra Multimedia APIs could get raw image via v4l2 only at 15fps

Hi forever3000,

Please try following patch to your vi driver and give out the log.

Also, please remember to turn off console log. It would influence the result.

sudo dmesg --console-off

---
 drivers/media/platform/tegra/camera/vi/channel.c  | 2 ++
 drivers/media/platform/tegra/camera/vi/vi4_fops.c | 5 +++++
 2 files changed, 7 insertions(+)

diff --git a/drivers/media/platform/tegra/camera/vi/channel.c b/drivers/media/platform/tegra/camera/vi/channel.c
index 170a4dd..6e27c9c 100644
--- a/drivers/media/platform/tegra/camera/vi/channel.c
+++ b/drivers/media/platform/tegra/camera/vi/channel.c
@@ -328,6 +328,8 @@ void free_ring_buffers(struct tegra_channel *chan, int frames)
 			chan->buffer_state[chan->free_index] =
 						VB2_BUF_STATE_ERROR;
 #endif
+        pr_err("Jerry %s dev[%p] vb2_buf[%p] sequence[%d] timestamp= %ld.%ld Line(%d)\n", __func__, chan->vi->ndev, chan->buffers[chan->free_index], vbuf->sequence, vbuf->timestamp.tv_sec, vbuf->timestamp.tv_usec, __LINE__);
+
 		vb2_buffer_done(&vbuf->vb2_buf,
 			chan->buffer_state[chan->free_index++]);
 
diff --git a/drivers/media/platform/tegra/camera/vi/vi4_fops.c b/drivers/media/platform/tegra/camera/vi/vi4_fops.c
index f5e0620..9c1134d 100644
--- a/drivers/media/platform/tegra/camera/vi/vi4_fops.c
+++ b/drivers/media/platform/tegra/camera/vi/vi4_fops.c
@@ -182,9 +182,12 @@ static bool vi_notify_wait(struct tegra_channel *chan,
 	 * Use the syncpt max value we just set as threshold
 	 */
 	for (i = 0; i < chan->valid_ports; i++) {
+        pr_err("Jerry %s dev[%p] vb2_buf[%p] SOF_SYNCPT_IDX++ Line(%d)\n", __func__, chan->vi->ndev, chan->buffers[chan->free_index], __LINE__);
 		err = nvhost_syncpt_wait_timeout_ext(chan->vi->ndev,
 				chan->syncpt[i][SOF_SYNCPT_IDX], thresh[i],
 				250, NULL, NULL);
+        pr_err("Jerry %s dev[%p] vb2_buf[%p] SOF_SYNCPT_IDX-- Line(%d)\n", __func__, chan->vi->ndev, chan->buffers[chan->free_index], __LINE__);
+
 		if (unlikely(err))
 			dev_err(chan->vi->dev,
 				"PXL_SOF syncpt timeout! err = %d\n", err);
@@ -513,7 +516,9 @@ static int tegra_channel_capture_frame(struct tegra_channel *chan,
 	}
 
 	/* wait for vi notifier events */
+    pr_err("Jerry %s dev[%p] vb2_buf[%p]++ Line(%d)\n", __func__, chan->vi->ndev, chan->buffers[chan->free_index], __LINE__);
 	vi_notify_wait(chan, &ts);
+    pr_err("Jerry %s dev[%p] vb2_buf[%p]-- Line(%d)\n", __func__, chan->vi->ndev, chan->buffers[chan->free_index], __LINE__);
 
 	vi4_check_status(chan);
 
-- 
2.1.4

Hi DaneLLL,

This is my dtb to support 3 cameras

/*
 * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 */

#include "t18x-common-platforms/tegra186-quill-camera-e3322-a00.dtsi"

#define CAM0_RST_L	TEGRA_MAIN_GPIO(R, 5)
#define CAM0_PWDN	TEGRA_MAIN_GPIO(R, 0)
#define CAM1_RST_L	TEGRA_MAIN_GPIO(R, 1)
#define CAM1_PWDN	TEGRA_MAIN_GPIO(L, 6)

/ {
	tegra-camera-platform {
		/**
		* tpg_max_iso = <>;
		* Max iso bw for 6 streams of tpg
		* streams * nvcsi_freq * PG_bitrate / RG10 * BPP
		* 6 * 102Mhz * 32 bits/ 10 bits * 2 Bps
		* = 3916.8 MBps
		*/
		tpg_max_iso = <3916800>;
	};

	/* set camera gpio direction to output */
	gpio@2200000 {
		camera-control-output-low {
			gpio-hog;
			output-low;
			gpios = <CAM0_RST_L 0 CAM0_PWDN 0
				 CAM1_RST_L 0 CAM1_PWDN 0>;
			label = "cam0-rst", "cam0-pwdn",
				"cam1-rst", "cam1-pwdn";
		};
	};

	/* all cameras are disabled by default */
	host1x {
		vi@15700000 {
			num-channels = <3>;
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				
				port@0 {
					reg = <0>;
					e3326_vi_in0: endpoint {
						csi-port = <0>;
						bus-width = <4>;
						remote-endpoint = <&e3326_csi_out0>;
					};
				};
				
				port@1 {
					reg = <1>;
					e3326_vi_in1: endpoint {
						csi-port = <2>;
						bus-width = <4>;
						remote-endpoint = <&e3326_csi_out1>;
					};
				};
				
				port@2 {
					reg = <2>;
					e3326_vi_in2: endpoint {
						csi-port = <4>;
						bus-width = <4>;
						remote-endpoint = <&e3326_csi_out2>;
					};
				};
			};
		};

		nvcsi@150c0000 {
			num-channels = <3>;
			#address-cells = <1>;
			#size-cells = <0>;
			
			channel@0 {
				reg = <0>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						e3326_csi_in0: endpoint@0 {
							csi-port = <0>;
							bus-width = <4>;
							remote-endpoint = <&e3326_ov10635_out0>;
						};
					};
					port@1 {
						reg = <1>;
						e3326_csi_out0: endpoint@1 {
							remote-endpoint = <&e3326_vi_in0>;
						};
					};
				};
			};
			
			channel@1 {
				reg = <1>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						e3326_csi_in1: endpoint@0 {
							csi-port = <2>;
							bus-width = <4>;
							remote-endpoint = <&e3326_ov10635_out1>;
						};
					};
					port@1 {
						reg = <1>;
						e3326_csi_out1: endpoint@1 {
							remote-endpoint = <&e3326_vi_in1>;
						};
					};
				};
			};
			
			channel@2 {
				reg = <2>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						e3326_csi_in2: endpoint@0 {
							csi-port = <4>;
							bus-width = <4>;
							remote-endpoint = <&e3326_ov10635_out2>;
						};
					};
					port@1 {
						reg = <1>;
						e3326_csi_out2: endpoint@1 {
							remote-endpoint = <&e3326_vi_in2>;
						};
					};
				};
			};
		};
	};

	i2c@3180000 {
		ov10635_c@30 {
			compatible = "nvidia,ov10635";
			
			/* Define any required hw resources needed by driver */
			/* ie. clocks, io pins, power sources */
			/* mclk-index indicates the index of the */
			/* mclk-name with in the clock-names array */

			clocks = <&tegra_car TEGRA186_CLK_EXTPERIPH1>,
					 <&tegra_car TEGRA186_CLK_PLLP_OUT0>;
			clock-names = "extperiph1", "pllp_grtba";
			mclk = "extperiph1";
			clock-frequency = <24000000>;
			reset-gpios = <&tegra_main_gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
			pwdn-gpios = <&tegra_main_gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
			
			/* I2C device address */
			reg = <0x30>;

			/* V4L2 device node location */
			devnode = "video0";

			/* Physical dimensions of sensor */
			physical_w = "3.674";
			physical_h = "2.738";

			/* Define any required hw resources needed by driver */
			/* ie. clocks, io pins, power sources */
			avdd-reg = "vana";
			iovdd-reg = "vif";
			vana-supply = <&en_vdd_cam_hv_2v8>;
			vif-supply = <&en_vdd_cam>;
			
			mode0 {
					mclk_khz = "24000";
					num_lanes = "4";
					tegra_sinterface = "serial_a";
					discontinuous_clk = "no";
					dpcm_enable = "false";
					cil_settletime = "0";

					active_w = "1280";
					active_h = "720";
					pixel_t = "uyvy";
					readout_orientation = "180";
					line_length = "1752";
					inherent_gain = "1";
					mclk_multiplier = "17.0";
					pix_clk_hz = "160000000";

					min_gain_val = "1.0";
					max_gain_val = "16";
					min_hdr_ratio = "1";
					max_hdr_ratio = "64";
					min_framerate = "2.787078";
					max_framerate = "120";
					min_exp_time = "22";
					max_exp_time = "358733";
					embedded_metadata_height = "0";
				};

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					e3326_ov10635_out0: endpoint {
						csi-port = <0>;
						bus-width = <4>;
						remote-endpoint = <&e3326_csi_in0>;
					};
				};
			};
		};
	};
	
	i2c@31c0000 {
		ov10635_c@30 {
			compatible = "nvidia,ov10635";
			
			/* Define any required hw resources needed by driver */
			/* ie. clocks, io pins, power sources */
			/* mclk-index indicates the index of the */
			/* mclk-name with in the clock-names array */

			clocks = <&tegra_car TEGRA186_CLK_EXTPERIPH1>,
					 <&tegra_car TEGRA186_CLK_PLLP_OUT0>;
			clock-names = "extperiph1", "pllp_grtba";
			mclk = "extperiph1";
			clock-frequency = <24000000>;
			reset-gpios = <&tegra_main_gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
			pwdn-gpios = <&tegra_main_gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
			
			/* I2C device address */
			reg = <0x30>;

			/* V4L2 device node location */
			devnode = "video1";

			/* Physical dimensions of sensor */
			physical_w = "3.674";
			physical_h = "2.738";

			/* Define any required hw resources needed by driver */
			/* ie. clocks, io pins, power sources */
			avdd-reg = "vana";
			iovdd-reg = "vif";
			vana-supply = <&en_vdd_cam_hv_2v8>;
			vif-supply = <&en_vdd_cam>;
			
			mode0 {
					mclk_khz = "24000";
					num_lanes = "4";
					tegra_sinterface = "serial_c";
					discontinuous_clk = "no";
					dpcm_enable = "false";
					cil_settletime = "0";

					active_w = "1280";
					active_h = "720";
					pixel_t = "uyvy";
					readout_orientation = "180";
					line_length = "1752";
					inherent_gain = "1";
					mclk_multiplier = "17.0";
					pix_clk_hz = "160000000";

					min_gain_val = "1.0";
					max_gain_val = "16";
					min_hdr_ratio = "1";
					max_hdr_ratio = "64";
					min_framerate = "2.787078";
					max_framerate = "120";
					min_exp_time = "22";
					max_exp_time = "358733";
					embedded_metadata_height = "0";
				};

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					e3326_ov10635_out1: endpoint {
						csi-port = <2>;
						bus-width = <4>;
						remote-endpoint = <&e3326_csi_in1>;
					};
				};
			};
		};
	};
	
	i2c@31e0000 {
		ov10635_c@30 {
			compatible = "nvidia,ov10635";
			
			/* Define any required hw resources needed by driver */
			/* ie. clocks, io pins, power sources */
			/* mclk-index indicates the index of the */
			/* mclk-name with in the clock-names array */

			clocks = <&tegra_car TEGRA186_CLK_EXTPERIPH1>,
					 <&tegra_car TEGRA186_CLK_PLLP_OUT0>;
			clock-names = "extperiph1", "pllp_grtba";
			mclk = "extperiph1";
			clock-frequency = <24000000>;
			reset-gpios = <&tegra_main_gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
			pwdn-gpios = <&tegra_main_gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
			
			/* I2C device address */
			reg = <0x30>;

			/* V4L2 device node location */
			devnode = "video2";

			/* Physical dimensions of sensor */
			physical_w = "3.674";
			physical_h = "2.738";

			/* Define any required hw resources needed by driver */
			/* ie. clocks, io pins, power sources */
			avdd-reg = "vana";
			iovdd-reg = "vif";
			vana-supply = <&en_vdd_cam_hv_2v8>;
			vif-supply = <&en_vdd_cam>;
			
			mode0 {
					mclk_khz = "24000";
					num_lanes = "4";
					tegra_sinterface = "serial_e";
					discontinuous_clk = "no";
					dpcm_enable = "false";
					cil_settletime = "0";

					active_w = "1280";
					active_h = "720";
					pixel_t = "uyvy";
					readout_orientation = "180";
					line_length = "1752";
					inherent_gain = "1";
					mclk_multiplier = "17.0";
					pix_clk_hz = "160000000";

					min_gain_val = "1.0";
					max_gain_val = "16";
					min_hdr_ratio = "1";
					max_hdr_ratio = "64";
					min_framerate = "2.787078";
					max_framerate = "120";
					min_exp_time = "22";
					max_exp_time = "358733";
					embedded_metadata_height = "0";
				};

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					e3326_ov10635_out2: endpoint {
						csi-port = <4>;
						bus-width = <4>;
						remote-endpoint = <&e3326_csi_in2>;
					};
				};
			};
		};
	};

	tegra-camera-platform {
		compatible = "nvidia, tegra-camera-platform";
		/**
		* Physical settings to calculate max ISO BW
		*
		* num_csi_lanes = <>;
		* Total number of CSI lanes when all cameras are active
		*
		* max_lane_speed = <>;
		* Max lane speed in Kbit/s
		*
		* min_bits_per_pixel = <>;
		* Min bits per pixel
		*
		* vi_peak_byte_per_pixel = <>;
		* Max byte per pixel for the VI ISO case
		*
		* vi_bw_margin_pct = <>;
		* Vi bandwidth margin in percentage
		*
		* max_pixel_rate = <>;
		* Max pixel rate in Kpixel/s for the ISP ISO case
		*
		* isp_peak_byte_per_pixel = <>;
		* Max byte per pixel for the ISP ISO case
		*
		* isp_bw_margin_pct = <>;
		* Isp bandwidth margin in percentage
		*/
		num_csi_lanes = <4>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <10>;
		vi_peak_byte_per_pixel = <2>;
		vi_bw_margin_pct = <25>;
		max_pixel_rate = <160000>;
		isp_peak_byte_per_pixel = <5>;
		isp_bw_margin_pct = <25>;

		/**
		* The general guideline for naming badge_info contains 3 parts, and is as follows,
		* The first part is the camera_board_id for the module; if the module is in a FFD
		* platform, then use the platform name for this part.
		* The second part contains the position of the module, ex. “rear” or “front”.
		* The third part contains the last 6 characters of a part number which is found
		* in the module's specsheet from the vender.
		*/
		modules {
			module0 {
				badge = "e3326_front_P5V27C";
				position = "rear";
				orientation = "1";
				drivernode0 {
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "ov10635 2-0030";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@3180000/ov10635_c@30";
					status = "okay";
				};
				drivernode1 {
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_lens";
					proc-device-tree = "/proc/device-tree/e3326_rear_lens_ov10635@P5V27C/";
				};
			};
			
			module1 {
				badge = "e3326_left_P5V27C";
				position = "left";
				orientation = "1";
				drivernode0 {
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "ov10635 1-0030";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@31c0000/ov10635_c@30";
					status = "okay";
				};
				drivernode1 {
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_lens";
					proc-device-tree = "/proc/device-tree/e3326_left_lens_ov10635@P5V27C/";
				};
			};
			
			module2 {
				badge = "e3326_right_P5V27C";
				position = "right";
				orientation = "1";
				drivernode0 {
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "ov10635 3-0030";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@31e0000/ov10635_c@30";
					status = "okay";
				};
				drivernode1 {
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_lens";
					proc-device-tree = "/proc/device-tree/e3326_right_lens_ov10635@P5V27C/";
				};
			};
		};
	};
};

Thanks

Hi WayneWWW,

This is result when I try to run below command to test fps

v4l2-ctl -d /dev/video0 --set-fmt-video=width=1280,height=720, --set-ctrl bypass_mode=0 --stream-mmap --stream-count=300
[   99.733454] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] SOF_SYNCPT_IDX++ Line(183)
[   99.756493] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] SOF_SYNCPT_IDX-- Line(187)
[   99.766291] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] SOF_SYNCPT_IDX++ Line(183)
[   99.823159] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] SOF_SYNCPT_IDX-- Line(187)
[   99.833052] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] SOF_SYNCPT_IDX++ Line(183)
[   99.889804] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] SOF_SYNCPT_IDX-- Line(187)
[   99.899600] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] sequence[0] timestamp= 109.372513 Line(328)
[   99.911189] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cc400] SOF_SYNCPT_IDX++ Line(183)
[   99.956495] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cc400] SOF_SYNCPT_IDX-- Line(187)
[   99.966363] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cc400] sequence[1] timestamp= 109.439160 Line(328)
[   99.977955] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cd400] SOF_SYNCPT_IDX++ Line(183)
[  100.023139] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cd400] SOF_SYNCPT_IDX-- Line(187)
[  100.032938] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cd400] sequence[2] timestamp= 109.505807 Line(328)
[  100.044585] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cf400] SOF_SYNCPT_IDX++ Line(183)
[  100.089781] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cf400] SOF_SYNCPT_IDX-- Line(187)
[  100.099642] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cf400] sequence[3] timestamp= 109.572454 Line(328)
[  100.111230] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] SOF_SYNCPT_IDX++ Line(183)
[  100.156415] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] SOF_SYNCPT_IDX-- Line(187)
[  100.166219] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] sequence[4] timestamp= 109.639101 Line(328)
[  100.177845] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cc400] SOF_SYNCPT_IDX++ Line(183)
[  100.223063] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cc400] SOF_SYNCPT_IDX-- Line(187)
[  100.232948] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cc400] sequence[5] timestamp= 109.705748 Line(328)
[  100.244549] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cd400] SOF_SYNCPT_IDX++ Line(183)
[  100.289733] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cd400] SOF_SYNCPT_IDX-- Line(187)
[  100.299547] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cd400] sequence[6] timestamp= 109.772395 Line(328)
[  100.311179] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cf400] SOF_SYNCPT_IDX++ Line(183)
[  100.356367] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cf400] SOF_SYNCPT_IDX-- Line(187)
[  100.366232] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cf400] sequence[7] timestamp= 109.839043 Line(328)
[  100.377828] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] SOF_SYNCPT_IDX++ Line(183)
[  100.423017] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] SOF_SYNCPT_IDX-- Line(187)
[  100.432810] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] sequence[8] timestamp= 109.905690 Line(328)
[  100.444439] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cc400] SOF_SYNCPT_IDX++ Line(183)
[  100.489670] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cc400] SOF_SYNCPT_IDX-- Line(187)
[  100.499473] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cc400] sequence[9] timestamp= 109.972337 Line(328)
[  100.511055] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cd400] SOF_SYNCPT_IDX++ Line(183)
[  100.556311] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cd400] SOF_SYNCPT_IDX-- Line(187)
[  100.566173] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cd400] sequence[10] timestamp= 110.38984 Line(328)
[  100.577766] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cf400] SOF_SYNCPT_IDX++ Line(183)
[  100.622959] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cf400] SOF_SYNCPT_IDX-- Line(187)
[  100.632765] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cf400] sequence[11] timestamp= 110.105631 Line(328)
[  100.644482] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] SOF_SYNCPT_IDX++ Line(183)
[  100.689639] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] SOF_SYNCPT_IDX-- Line(187)
[  100.699505] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] sequence[12] timestamp= 110.172278 Line(328)
[  100.711182] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cc400] SOF_SYNCPT_IDX++ Line(183)
[  100.756261] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cc400] SOF_SYNCPT_IDX-- Line(187)
[  100.766066] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cc400] sequence[13] timestamp= 110.238926 Line(328)
[  100.777785] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cd400] SOF_SYNCPT_IDX++ Line(183)
[  100.822904] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cd400] SOF_SYNCPT_IDX-- Line(187)
[  100.832764] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cd400] sequence[14] timestamp= 110.305573 Line(328)
[  100.844438] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cf400] SOF_SYNCPT_IDX++ Line(183)
[  100.889541] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cf400] SOF_SYNCPT_IDX-- Line(187)
[  100.899341] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cf400] sequence[15] timestamp= 110.372220 Line(328)
[  100.911045] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] SOF_SYNCPT_IDX++ Line(183)
[  100.956190] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] SOF_SYNCPT_IDX-- Line(187)
[  100.966044] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] sequence[16] timestamp= 110.438867 Line(328)
[  100.977720] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cc400] SOF_SYNCPT_IDX++ Line(183)
[  101.022846] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cc400] SOF_SYNCPT_IDX-- Line(187)
[  101.032646] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cc400] sequence[17] timestamp= 110.505514 Line(328)
[  101.044362] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cd400] SOF_SYNCPT_IDX++ Line(183)
[  101.089491] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cd400] SOF_SYNCPT_IDX-- Line(187)
[  101.099291] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cd400] sequence[18] timestamp= 110.572161 Line(328)
[  101.110960] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cf400] SOF_SYNCPT_IDX++ Line(183)
[  101.156127] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cf400] SOF_SYNCPT_IDX-- Line(187)
[  101.165927] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cf400] sequence[19] timestamp= 110.638808 Line(328)
[  101.177632] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] SOF_SYNCPT_IDX++ Line(183)
[  101.222785] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] SOF_SYNCPT_IDX-- Line(187)
[  101.232594] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46ce800] sequence[20] timestamp= 110.705456 Line(328)
[  101.244345] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cc400] SOF_SYNCPT_IDX++ Line(183)
[  101.289429] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cc400] SOF_SYNCPT_IDX-- Line(187)
[  101.299291] Jerry free_ring_buffers dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cc400] sequence[21] timestamp= 110.772103 Line(328)
[  101.310966] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cd400] SOF_SYNCPT_IDX++ Line(183)
[  101.356072] Jerry vi_notify_wait dev[ffffffc1eb82d400] vb2_buf[ffffffc1c46cd400] SOF_SYNCPT_IDX-- Line(187)

Thanks

Thank forever3000 for the log. We will take a look at the issue and then get back to you.

Hi Vu,
Please share more information. Per device tree, there are 3 ov10635s, so all of the 3 cannot achieve 720p30?

Looks like you only try video0 @ serial_a.

Our system has 3 ov10635 sensors and I already tried 3 of them, all could only achieve 720p15.

One more information, few time I faced this issue then just restart it was disappeared in the next time running

[  173.860720] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[  174.864800] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[  175.868881] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[  176.872956] tegra-vi4 15700000.vi: ATOMP_FE syncpt timeout!

Thanks

Hi Vu,
Please try the patch:

tegra_channel_update_clknbw @ kernel-4.4/drivers/media/platform/tegra/camera/vi/vi4_fops.c
+                  request_pixelrate *= 2;                                                                      
                   /* VI clk should be slightly faster than CSI clk*/                                           
                   ret = nvhost_module_set_rate(chan->vi->ndev, &chan->video,                                   
                                   request_pixelrate, 0, NVHOST_PIXELRATE);

Hi DaneLLL,

After apply your patch, camera still run at 720p15.
I think in “vi_notify_wait” function this line take time for waiting

err = nvhost_syncpt_wait_timeout_ext(chan->vi->ndev,
				chan->syncpt[i][SOF_SYNCPT_IDX], thresh[i],
				250, NULL, NULL);

Because if I comment it, the camera could run at 33-34fps however the image was overlapped each other.

I tried to compare kernel source code between TX1 28.1 and TX2 28.1, everything is same. But it run well on TX1, still could not figure out the reason.

Thanks,
Vu Nguyen

Hi Vu,
Please try higher mclk_khz or simply mark it

+				//mclk_khz = "24000";

Hi DaneLLL,

I tried both ways but result still was 15pfs.

Thanks and Best Regards,
Vu Nguyen

As far as I know that the most different between TX1 and TX2 now is vi module
TX1 : vi2 in vi2_fops.c
TX2 : vi4 in vi4_fops.c
Is there any recommendation for me to debug this issue ?

Thanks
Vu Nguyen

Hi Vu,
Does your sensor have other modes to try, such as 720p25 or 640x480p30?

When we tried to set it run as 60fps even though the image is not good but TX2 could capture only at 30fps. We also measured MIPI by oscilloscope to confirm that it running at 60fps.

So now I think TX2 could capture only half of MIPI output data.

Thanks

Update:

As I check this function “nvhost_syncpt_wait_timeout_ext” in “tegra_channel_capture_frame” on both platforms:

TX1 : it took 14ms
TX2 : it took 48ms

Even though MIPI data output was same.

Thanks and Best Regards,
Vu Nguyen

Hi Vu,
Please share/comapre the clock tree of both platforms.

$ sudo su
# cat /sys/kernel/debug/clk/clk_summary

Not sure but clock frequency is probably not high enough.

Hi DaneLLL,

Due to big size so I uploaded to google drive
Here they are

TX2:

https://drive.google.com/open?id=1vUcr7AxBboeae6SgED56vT-xKrYvjcLu

TX1:

https://drive.google.com/open?id=1c2LvCY2tkgnI2W1L-DDFSUVq_l4kAQNe

Thanks

Hi Vu, seems like vi and csi clocks are off. Do you run the command while doing sensor capture?

And you may attach via


Hi Dane LLL,

This is TX2 when running capture

clock                                           enable_cnt  prepare_cnt        rate    req_rate   accuracy   phase
----------------------------------------------------------------------------------------------------------------------
 vi                                                         1            1   115200000     3801600          0 0  
 *[        default_freq                                       0]
 isp                                                        0            0   768000000   768000000          0 0  
 *[        default_freq                                       0]
 sce_cpu_nic                                                1            1   473600000   473600000          0 0  
 *[        default_freq                                       0]
 se                                                         0            0   601600000   601600000          0 0  
 *[        default_freq                                       0]
 eqos_rx_input                                              1            1           0           0          0 0  
 *[        default_freq                                       0]
    eqos_rx                                                 1            1           0           0          0 0  
    *[        default_freq                                       0]
 axi_cbb                                                    1            1   115200000   115200000          0 0  
 *[        default_freq                                       0]
 gpc2clk                                                    1            1           0           0          0 0  
 *[        default_freq                                       0]
    gpcclk                                                  1            1   114750000   114750000          0 0  
    *[        default_freq                                       0]
 sor1_pad_clkout                                            8            8           0           0          0 0  
 *[        default_freq                                       0]
    sor1_out                                                7            7           0    24000000          0 0  
    *[        default_freq                                       0]
 i2s6_sync_input                                            0            0           0           0          0 0  
 *[        default_freq                                       0]
 i2s5_sync_input                                            0            0           0           0          0 0  
 *[        default_freq                                       0]
 i2s4_sync_input                                            0            0           0           0          0 0  
 *[        default_freq                                       0]
 i2s3_sync_input                                            0            0           0           0          0 0  
 *[        default_freq                                       0]
 i2s2_sync_input                                            0            0           0           0          0 0  
 *[        default_freq                                       0]
 i2s1_sync_input                                            0            0     1411200     1411200          0 0  
 *[        default_freq                                       0]
    i2s1_sync_clk                                           0            0     1411200           0          0 0  
    *[        default_freq                                       0]
    dspk2_sync_clk                                          0            0     1411200           0          0 0  
    *[        default_freq                                       0]
    dspk1_sync_clk                                          0            0     1411200           0          0 0  
    *[        default_freq                                       0]
    dmic4_sync_clk                                          0            0     1411200           0          0 0  
    *[        default_freq                                       0]
    dmic3_sync_clk                                          0            0     1411200           0          0 0  
    *[        default_freq                                       0]
    dmic2_sync_clk                                          0            0     1411200           0          0 0  
    *[        default_freq                                       0]
    dmic1_sync_clk                                          0            0     1411200           0          0 0  
    *[        default_freq                                       0]
 spdifin_sync_input                                         0            0           0           0          0 0  
 *[        default_freq                                       0]
    spdif_sync_clk                                          0            0           0           0          0 0  
    *[        default_freq                                       0]
    i2s6_sync_clk                                           0            0           0           0          0 0  
    *[        default_freq                                       0]
    i2s5_sync_clk                                           0            0           0           0          0 0  
    *[        default_freq                                       0]
    i2s4_sync_clk                                           0            0           0           0          0 0  
    *[        default_freq                                       0]
    i2s3_sync_clk                                           0            0           0           0          0 0  
    *[        default_freq                                       0]
    i2s2_sync_clk                                           0            0           0           0          0 0  
    *[        default_freq                                       0]
 nvjpg                                                      0            0   857600000   857600000          0 0  
 *[        default_freq                                       0]
 nvenc                                                      0            0  1164800000  1164800000          0 0  
 *[        default_freq                                       0]
 vic                                                        1            1  1024000000  4294967295          0 0  
 *[        default_freq                                       0]
 nvdec                                                      0            0  1203200000  1203200000          0 0  
 *[        default_freq                                       0]
 tsecb                                                      0            0   716800000   716800000          0 0  
 *[        default_freq                                       0]
 tsec                                                       0            0   716800000   716800000          0 0  
 *[        default_freq                                       0]
 emc                                                        0            0   665600000   665600000          0 0  
 *[        default_freq                                       0]
 osc                                                        3            3    38400000    38400000          0 0  
 *[        default_freq                                       0]
    usb2_hsic_trk                                           1            1     9600000     9600000          0 0  
    *[        default_freq                                       0]
       hsic_trk                                             0            0     9600000     9600000          0 0  
       *[        default_freq                                       0]
       usb2_trk                                             1            1     9600000     9600000          0 0  
       *[        default_freq                                       0]
    spi2                                                    1            1    38400000    38400000          0 0  
    *[        default_freq                                       0]
    nafll_disp                                              0            0           0           0          0 0  
    *[        default_freq                                       0]
       dflldisp_div                                         0            0           0           0          0 0  
       *[        default_freq                                       0]
    pwm4                                                    1            1    38400000    38400000          0 0  
    *[        default_freq                                       0]
 clk_m                                                      8            8    19200000    19200000          0 0  
 *[        default_freq                                       0]
    tach                                                    1            1     1010526     1010526          0 0  
    *[        default_freq                                       0]
    spi4                                                    1            1    19200000    19200000          0 0  
    *[        default_freq                                       0]
    spi1                                                    1            1    19200000    19200000          0 0  
    *[        default_freq                                       0]
    hda2hdmicodec                                           2            2    19200000    19200000          0 0  
    *[        default_freq                                       0]
    fuse                                                    1            1    19200000    19200000          0 0  
    *[        default_freq                                       0]
       kfuse                                                0            0    19200000    19200000          0 0  
       *[        default_freq                                       0]
    nvdisplay_p2                                            1            1    19200000    19200000          0 0  
    *[        default_freq                                       0]
    i2s6                                                    0            0    19200000    19200000          0 0  
    *[        default_freq                                       0]
    i2s5                                                    0            0    19200000    19200000          0 0  
    *[        default_freq                                       0]
    i2s4                                                    0            0    19200000    19200000          0 0  
    *[        default_freq                                       0]
    i2s3                                                    0            0    19200000    19200000          0 0  
    *[        default_freq                                       0]
    i2s2                                                    0            0    19200000    19200000          0 0  
    *[        default_freq                                       0]
    actmon                                                  5            5    19200000    19200000          0 0  
    *[        default_freq                                       0]
    mipi_cal                                                1            1    19200000    19200000          0 0  
    *[        default_freq                                       0]
    dbgapb                                                  0            0    19200000    19200000          0 0  
    *[        default_freq                                       0]
 clk_32k                                                    0            0       32768       32768          0 0  
 *[        default_freq                                       0]
    aon_i2c_slow                                            0            0       32768       32768          0 0  
    *[        default_freq                                       0]
    i2c_slow                                                0            0       32768       32768          0 0  
    *[        default_freq                                       0]
 pll_ref                                                    6            6    38400000    38400000          0 0  
 *[        default_freq                                       0]
    pll_nvcsi                                               1            1   450000000   450000000          0 0  
    *[        default_freq                                       0]
       nvcsi                                                2            2   225000000    19200000          0 0  
       *[        default_freq                                       0]
    pll_e                                                   1            1    38400000    38400000          0 0  
    *[        default_freq                                       0]
    pll_c4_vco                                              0            0   784999218   784999218          0 0  
    *[        default_freq                                       0]
       pll_c4_out0                                          0            0   196249804   196249804          0 0  
       *[        default_freq                                       0]
          sdmmc4                                            0            0   196249804   196249804          0 0  
          *[        default_freq                                       0]
       pll_c4_vco_div2                                      0            0   392499609   392499609          0 0  
       *[        default_freq                                       0]
       pll_c4_out2                                          0            0   156999843   156999843          0 0  
       *[        default_freq                                       0]
       pll_c4_out1                                          0            0   261666406   261666406          0 0  
       *[        default_freq                                       0]
          pll_c4_out_mux                                    0            0   261666406   261666406          0 0  
          *[        default_freq                                       0]
             pllc4_out                                      0            0   261666406   261666406          0 0  
             *[        default_freq                                       0]
    pll_disphub                                             0            0   307200000   307200000          0 0  
    *[        default_freq                                       0]
       plldisphub_div                                       0            0   307200000   307200000          0 0  
       *[        default_freq                                       0]
    pll_a1                                                  0            0   600000000   600000000          0 0  
    *[        default_freq                                       0]
       aclk                                                 0            0   300000000   300000000          0 0  
       *[        default_freq                                       0]
          adspneon                                          0            0   300000000   300000000          0 0  
          *[        default_freq                                       0]
          adsp                                              0            0   300000000   300000000          0 0  
          *[        default_freq                                       0]
       pll_a_out1                                           0            0   150000000   150000000          0 0  
       *[        default_freq                                       0]
          ape                                               0            0   150000000   150000000          0 0  
          *[        default_freq                                       0]
             apb2ape                                        0            0   150000000   150000000          0 0  
             *[        default_freq                                       0]
    pll_a_vco                                               0            0   258000000   258000000          0 0  
    *[        default_freq                                       0]
       pll_a                                                0            0   270950390   270950400          0 0  
       *[        default_freq                                       0]
          pll_a_out0                                        0            0    45158398    45158400          0 0  
          *[        default_freq                                       0]
             spdif_out                                      0            0     5644799     5644800          0 0  
             *[        default_freq                                       0]
             i2s1                                           0            0     1411199     1411200          0 0  
             *[        default_freq                                       0]
             aud_mclk                                       0            0    11289599    11289600          0 0  
             *[        default_freq                                       0]
             dspk2                                          0            0    45158398    43000000          0 0  
             *[        default_freq                                       0]
             dspk1                                          0            0    45158398    43000000          0 0  
             *[        default_freq                                       0]
             dmic4                                          0            0    11289599    12285714          0 0  
             *[        default_freq                                       0]
             dmic3                                          0            0    11289599    12285714          0 0  
             *[        default_freq                                       0]
             dmic2                                          0            0    11289599    12285714          0 0  
             *[        default_freq                                       0]
             dmic1                                          0            0    11289599    12285714          0 0  
             *[        default_freq                                       0]
             ahub                                           0            0    45158398    45158400          0 0  
             *[        default_freq                                       0]
    pll_d3                                                  0            0    25806426    25806426          0 0  
    *[        default_freq                                       0]
    pll_d2                                                  2            2   148500000   148500000          0 0  
    *[        default_freq                                       0]
       sor1                                                 1            1   148500000    19200000          0 0  
       *[        default_freq                                       0]
       nvdisplay_p1                                         3            3   148500000   148500000          0 0  
       *[        default_freq                                       0]
          nvdisplay_disp                                    2            2   148500000   194000000          0 0  
          *[        default_freq                                       0]
    pll_d                                                   1            1   582000000   582000000          0 0  
    *[        default_freq                                       0]
       pll_d_out1                                           1            1   582000000   582000000          0 0  
       *[        default_freq                                       0]
          nvdisplay_p0                                      2            2   194000000   194000000          0 0  
          *[        default_freq                                       0]
             nvdisplay_dsc                                  1            1   194000000   194000000          0 0  
             *[        default_freq                                       0]
    pll_c2                                                  0            0   307200000   307200000          0 0  
    *[        default_freq                                       0]
    pll_u                                                   3            3    38400000    38400000          0 0  
    *[        default_freq                                       0]
       pll_u_480M                                           0            0   480000000   480000000          0 0  
       *[        default_freq                                       0]
       pll_u_48M                                            0            0    48000000    48000000          0 0  
       *[        default_freq                                       0]
          xusb_fs                                           0            0    48000000    48000000          0 0  
          *[        default_freq                                       0]
             xusb_dev                                       0            0    48000000    48000000          0 0  
             *[        default_freq                                       0]
       pll_refe_ref                                         1            1    60000000    60000000          0 0  
       *[        default_freq                                       0]
          pllrefe_iddq                                      1            1    60000000    60000000          0 0  
          *[        default_freq                                       0]
             pll_refe                                       1            1   625000000   625000000          0 0  
             *[        default_freq                                       0]
                pll_refe_out1                               3            3   625000000   625000000          0 0  
                *[        default_freq                                       0]
                   eqos_tx_clk                              1            1    25000000    25000000          0 0  
                   *[        default_freq                                       0]
                   eqos_ptp_ref_clk                         1            1   125000000   125000000          0 0  
                   *[        default_freq                                       0]
                   pllrefe_out1_div5                        1            1   125000000   125000000          0 0  
                   *[        default_freq                                       0]
                      eqos_axi_clk                          1            1   125000000   125000000          0 0  
                      *[        default_freq                                       0]
                pll_refe_out                                0            0   312500000   312500000          0 0  
                *[        default_freq                                       0]
                   pllrefe_out_gated                        0            0   312500000   312500000          0 0  
                   *[        default_freq                                       0]
    pll_aon                                                 0            0   480000000   480000000          0 0  
    *[        default_freq                                       0]
    pll_c                                                   0            0   307200000   307200000          0 0  
    *[        default_freq                                       0]
    pll_p                                                   4            4   408000000   408000000          0 0  
    *[        default_freq                                       0]
       sata_oob                                             0            0   204000000    19200000          0 0  
       *[        default_freq                                       0]
       pll_p_out5                                           1            1   204000000   204000000          0 0  
       *[        default_freq                                       0]
          gpu                                               1            1   204000000   204000000          0 0  
          *[        default_freq                                       0]
       pll_p_div17                                          1            1    24000000    24000000          0 0  
       *[        default_freq                                       0]
          sor_safe                                          9            9    24000000    24000000          0 0  
          *[        default_freq                                       0]
             dpaux1                                         0            0    24000000    24000000          0 0  
             *[        default_freq                                       0]
       host1x                                               4            4   102000000   102000000          0 0  
       *[        default_freq                                       0]
       pll_p_out0                                          17           17   408000000   408000000          0 0  
       *[        default_freq                                       0]
          nvcsilp                                           2            2   204000000    19200000          0 0  
          *[        default_freq                                       0]
          sdmmc1                                            0            0     6000000     6000000          0 0  
          *[        default_freq                                       0]
          sdmmc3                                            0            0   204000000   204000000          0 0  
          *[        default_freq                                       0]
          sce_apb                                           1            1   102000000   102000000          0 0  
          *[        default_freq                                       0]
          extperiph1                                        1            1    24000000    24000000          0 0  
          *[        default_freq                                       0]
          xusb                                              1            1   102000000   102000000          0 0  
          *[        default_freq                                       0]
             xusb_ss                                        0            0   102000000   102000000          0 0  
             *[        default_freq                                       0]
          sata                                              0            0   102000000    19200000          0 0  
          *[        default_freq                                       0]
          hda2codec_2x                                      2            2    48000000    48000000          0 0  
          *[        default_freq                                       0]
          hda                                               2            2    51000000    51000000          0 0  
          *[        default_freq                                       0]
          uartd                                             0            0   408000000    19200000          0 0  
          *[        default_freq                                       0]
          uartc                                             0            0   408000000    38400000          0 0  
          *[        default_freq                                       0]
          uartb                                             0            0   408000000    19200000          0 0  
          *[        default_freq                                       0]
          uarta                                             1            1   408000000   408000000          0 0  
          *[        default_freq                                       0]
          nvdisplayhub                                      2            2    19428571    18731250          0 0  
          *[        default_freq                                       0]
          spdif_in                                          0            0    48000000    48000000          0 0  
          *[        default_freq                                       0]
          pwm3                                              0            0    18545454   102000000          0 0  
          *[        default_freq                                       0]
          pwm2                                              0            0    18545454   102000000          0 0  
          *[        default_freq                                       0]
          pwm1                                              0            0    18545454   102000000          0 0  
          *[        default_freq                                       0]
          uart_fst_mipi_cal                                 1            1    68000000    68000000          0 0  
          *[        default_freq                                       0]
          i2c9                                              1            1    20400000    20700000          0 0  
          *[        default_freq                                       0]
          i2c8                                              1            1    20400000    20700000          0 0  
          *[        default_freq                                       0]
          i2c7                                              1            1    20400000    20700000          0 0  
          *[        default_freq                                       0]
          i2c6                                              1            1    20400000    20700000          0 0  
          *[        default_freq                                       0]
          i2c4                                              1            1    20400000    20700000          0 0  
          *[        default_freq                                       0]
          i2c3                                              1            1    20400000    20700000          0 0  
          *[        default_freq                                       0]
          i2c2                                              1            1    81600000    83200000          0 0  
          *[        default_freq                                       0]
          i2c1                                              1            1    20400000    20700000          0 0  
          *[        default_freq                                       0]
          pllp_grtcba                                       0            0   408000000   408000000          0 0  
          *[        default_freq                                       0]
             pllp_grtbb                                     0            0   408000000   408000000          0 0  
             *[        default_freq                                       0]
             pllp_xusb                                      0            0   408000000   408000000          0 0  
             *[        default_freq                                       0]
             pllp_uphy                                      0            0   408000000   408000000          0 0  
             *[        default_freq                                       0]
             pllp_audio                                     0            0   408000000   408000000          0 0  
             *[        default_freq                                       0]
             pllp_grtcab                                    0            0   408000000   408000000          0 0  
             *[        default_freq                                       0]
                pllp_boot                                   0            0   408000000   408000000          0 0  
                *[        default_freq                                       0]
                pllp_grtcaa                                 0            0   408000000   408000000          0 0  
                *[        default_freq                                       0]
                   pllp_grtlb                               0            0   408000000   408000000          0 0  
                   *[        default_freq                                       0]
                      pllp_grtla                            0            0   408000000   408000000          0 0  
                      *[        default_freq                                       0]
                         pllp_grtba                         0            0   408000000   408000000          0 0  
                         *[        default_freq                                       0]
                pllp_grtcbb                                 0            0   408000000   408000000          0 0  
                *[        default_freq                                       0]
                   pllp_display                             0            0   408000000   408000000          0 0  
                   *[        default_freq                                       0]
                   pllp_grttb                               0            0   408000000   408000000          0 0  
                   *[        default_freq                                       0]
                      pllp_grtta                            0            0   408000000   408000000          0 0  
                      *[        default_freq                                       0]
                      pllp_aon                              0            0   408000000   408000000          0 0  
                      *[        default_freq                                       0]
 clk32k_in                                                  0            0       32768       32768          0 0  
 *[        default_freq                                       0]

And
TX1 when running capture

clock                                           enable_cnt  prepare_cnt        rate    req_rate   accuracy   phase
----------------------------------------------------------------------------------------------------------------------
 dfllCPU_out                                                1            1  1734000000  1734000000          0 0  
    cclk_g                                                  1            1  1734000000           0          0 0  
 vimclk_sync                                                0            0    24000000    24000000          0 0  
 i2s4_sync                                                  0            0    24000000    24000000          0 0  
 i2s3_sync                                                  0            0    24000000    24000000          0 0  
 i2s2_sync                                                  0            0    24000000    24000000          0 0  
 i2s1_sync                                                  0            0    24000000    24000000          0 0  
 i2s0_sync                                                  0            0     1411200     1411200          0 0  
    dmic3_sync_clk_mux                                      0            0     1411200    24000000          0 0  
       dmic3_sync_clk                                       0            0     1411200    24000000          0 0  
    dmic2_sync_clk_mux                                      0            0     1411200    24000000          0 0  
       dmic2_sync_clk                                       0            0     1411200    24000000          0 0  
    dmic1_sync_clk_mux                                      0            0     1411200    24000000          0 0  
       dmic1_sync_clk                                       0            0     1411200    24000000          0 0  
 spdif_in_sync                                              0            0    24000000    24000000          0 0  
    spdif_mux                                               0            0    24000000    24000000          0 0  
       spdif                                                0            0    24000000    24000000          0 0  
          spdif_doubler                                     0            0    48000000    48000000          0 0  
             spdif_div                                      0            0    48000000    48000000          0 0  
                spdif_2x                                    0            0    48000000    48000000          0 0  
    audio4_mux                                              0            0    24000000    24000000          0 0  
       audio4                                               0            0    24000000    24000000          0 0  
    audio3_mux                                              0            0    24000000    24000000          0 0  
       audio3                                               0            0    24000000    24000000          0 0  
    audio2_mux                                              0            0    24000000    24000000          0 0  
       audio2                                               0            0    24000000    24000000          0 0  
    audio1_mux                                              0            0    24000000    24000000          0 0  
       audio1                                               0            0    24000000    24000000          0 0  
    audio0_mux                                              0            0    24000000    24000000          0 0  
       audio0                                               0            0    24000000    24000000          0 0  
 pd2vi                                                      0            0           0           0          0 0  
 sor1_brick                                                 1            1   148500000   148500000          0 0  
    sor1                                                    1            1   148500000           0          0 0  
 clk_32k                                                    1            1       32768       32768          0 0  
    blink_override                                          0            0       32768       32768          0 0  
       blink                                                0            0       32768       32768          0 0  
    rtc                                                     1            1       32768       32768          0 0  
 osc                                                        4            4    38400000    38400000          0 0  
    usb2_hsic_trk                                           0            0     9600000     9600000          0 0  
       hsic_trk                                             0            0     9600000           0          0 0  
       usb2_trk                                             0            0     9600000           0          0 0  
    xusb_gate                                               1            1    38400000    38400000          0 0  
    pll_mb                                                  0            0  1331200000  1600000000          0 0  
       pll_mb_ud                                            0            0  1331200000  1331200000          0 0  
    pll_m                                                   1            1  1600000000   800000000          0 0  
       pll_m_ud                                             1            1  1600000000  1600000000          0 0  
          emc                                               3            3  1600000000   800000000          0 0  
             emc_master                                     2            2  1600000000  1600000000          0 0  
                bwmgr.emc                                   1            1  1600000000  1600000000          0 0  
                pcie.emc                                    0            0  1600000000   800000000          0 0  
                ape.emc                                     0            0  1600000000   800000000          0 0  
                vic.shared_emc                              0            0  1600000000   800000000          0 0  
                vic.emc                                     0            0  1600000000   800000000          0 0  
                vib.emc                                     0            0  1600000000   800000000          0 0  
                via.emc                                     0            0  1600000000   800000000          0 0  
                tsecb.emc                                   0            0  1600000000   800000000          0 0  
                nvdec.emc                                   0            0  1600000000   800000000          0 0  
                nvjpg.emc                                   0            0  1600000000   800000000          0 0  
                gr3d.emc                                    0            0  1600000000   800000000          0 0  
                sdmmc3.emc                                  0            0  1600000000   800000000          0 0  
                disp2.la.emc                                1            1  1600000000    68000000          0 0  
                disp1.la.emc                                0            0  1600000000   800000000          0 0  
                xusb.emc                                    0            0  1600000000   800000000          0 0  
                ispb.emc                                    0            0  1600000000   800000000          0 0  
                ispa.emc                                    0            0  1600000000   800000000          0 0  
                battery.emc                                 0            0  1600000000  1600000000          0 0  
                edp.emc                                     0            0  1600000000  1600000000          0 0  
                override.emc                                0            0  1600000000   800000000          0 0  
                floor.emc                                   0            0  1600000000   800000000          0 0  
                cap.throttle.emc                            0            0  1600000000  1600000000          0 0  
                cap.emc                                     0            0  1600000000  1600000000          0 0  
                iso.emc                                     0            0  1600000000   800000000          0 0  
                camera.emc                                  0            0  1600000000   800000000          0 0  
                sdmmc4.emc                                  0            0  1600000000   800000000          0 0  
                tsec.emc                                    0            0  1600000000   800000000          0 0  
                mon.emc                                     0            0  1600000000   800000000          0 0  
                usb3.emc                                    0            0  1600000000   800000000          0 0  
                usb2.emc                                    0            0  1600000000   800000000          0 0  
                usb1.emc                                    0            0  1600000000   800000000          0 0  
                usbd.emc                                    0            0  1600000000   800000000          0 0  
                disp2.emc                                   0            0  1600000000   800000000          0 0  
                disp1.emc                                   0            0  1600000000   800000000          0 0  
                cpu.emc                                     0            0  1600000000   800000000          0 0  
                avp.emc                                     0            0  1600000000   800000000          0 0  
             mc                                             4            4   800000000   400000000          0 0  
                mc_cdpa                                     1            1   800000000   400000000          0 0  
                mc_ccpa                                     1            1   800000000   400000000          0 0  
                mc_cbpa                                     1            1   800000000   400000000          0 0  
                mc_capa                                     1            1   800000000   400000000          0 0  
    pll_ref                                                10           10    38400000    38400000          0 0  
       pll_x                                                0            0   691200000   691200000          0 0  
          pll_x_out0                                        0            0   345600000   345600000          0 0  
       pll_a1                                               0            0   307200000   307200000          0 0  
          aclk                                              0            0   307200000    19200000          0 0  
             adsp                                           0            0   307200000           0          0 0  
             adsp_neon                                      0            0   307200000           0          0 0  
          abus                                              0            0   307200000   307200000          0 0  
             override.abus                                  0            0   307200000   307200000          0 0  
             cap.vcore.abus                                 0            0   844800000  4294967295          0 0  
             adsp.cpu.abus                                  0            0   307200000   307200000          0 0  
       pll_a                                                2            2   338687500   338688000          0 0  
          pll_a_out0_div                                    1            1    45158334    62110312          0 0  
             pll_a_out0                                     2            2    45158334    45158400          0 0  
                d_audio                                     0            0    45158334    45158400          0 0  
                   d_audio_slcg_ovr                         0            0    45158334    19200000          0 0  
                i2s4                                        0            0     6021112     1536000          0 0  
                i2s3                                        0            0     6021112     1536000          0 0  
                i2s2                                        0            0     6021112     1536000          0 0  
                i2s1                                        0            0     6021112     1536000          0 0  
                i2s0                                        0            0     1411198     1411200          0 0  
                extern1                                     3            3    11289584    11289600          0 0  
                   clk_out_1_mux                            2            2    11289584    19200000          0 0  
                      clk_out_1                             1            1    11289584    19200000          0 0  
                dmic1                                       0            0    11289584     3072000          0 0  
                dmic2                                       0            0    11289584     3072000          0 0  
                dmic3                                       0            0    11289584     3072000          0 0  
          pll_a_out_adsp                                    0            0   338687500           0          0 0  
          pll_a_out0_out_adsp                               0            0   338687500           0          0 0  
       pllg_ref                                             2            2    38400000    38400000          0 0  
          gpcclk                                            1            1    76800000    76800000          0 0  
             gbus                                           1            1    76800000    76800000          0 0  
                floor.profile_gbus                          0            0    76800000           0          0 0  
                floor.gbus                                  0            0    76800000           0          0 0  
                override.gbus                               0            0    76800000           0          0 0  
                cap.profile_gbus                            0            0  1300000000  1300000000          0 0  
                cap.throttle_gbus                           0            0  1300000000  1300000000          0 0  
                cap.vgpu.gbus                               0            0  1300000000  1300000000          0 0  
                edp.gbus                                    0            0   998400000   998400000          0 0  
                cap.gbus                                    0            0  1300000000  1300000000          0 0  
                gm20b.gbus                                  1            1    76800000    76800000          0 0  
       gpu                                                  1            1    38400000    38400000          0 0  
       pll_p                                               26           29   408000000   408000000          0 0  
          pwm                                               2            2    48000000    48000000          0 0  
          vii2c                                             1            2    81600000    86400000          0 0  
          cilab                                             1            1   102000000   102000000          0 0  
          cilcd                                             1            1   102000000   102000000          0 0  
          cile                                              1            1   102000000   102000000          0 0  
          extern3                                           1            1    24000000    24000000          0 0  
             clk_out_3_mux                                  1            1    24000000    19200000          0 0  
                clk_out_3                                   1            1    24000000    19200000          0 0  
          clk72mhz                                          1            1    68000000    68000000          0 0  
          sdmmc2                                            0            0   204000000   204000000          0 0  
          i2c6                                              0            1    81600000    83200000          0 0  
          i2c4                                              0            1    20400000    20800000          0 0  
          ape                                               1            1    25500000    25500000          0 0  
             ape_master                                     0            0    25500000     9600000          0 0  
                override.ape                                0            0    25500000     9600000          0 0  
                xbar.ape                                    0            0    25500000     9600000          0 0  
                adsp.ape                                    0            0    25500000     9600000          0 0  
                adma.ape                                    0            0    25500000     9600000          0 0  
             aclk_slcg_ovr                                  0            0    25500000     9600000          0 0  
             ape_slcg_ovr                                   0            0    25500000     9600000          0 0  
          sata_oob                                          0            0   204000000   204000000          0 0  
          sata                                              0            0   102000000   104000000          0 0  
             sata_slcg_ovr_fpci                             0            0   102000000    19200000          0 0  
             sata_slcg_ovr_ipfs                             0            0   102000000    19200000          0 0  
             sata_slcg_ovr                                  0            0   102000000    19200000          0 0  
          sbc4                                              1            1    12000000    12000000          0 0  
          dfll_ref                                          2            2    51000000    51000000          0 0  
          dfll_soc                                          2            2    51000000    51000000          0 0  
          sclk_mux                                          2            2   408000000   204000000          0 0  
             sclk                                           2            2   204000000   204000000          0 0  
                sclk_skipper                                2            2   204000000   408000000          0 0  
                   sbus                                     1            1   204000000   204000000          0 0  
                      vcm.sclk                              0            0   204000000   204000000          0 0  
                      cap.vcore.sclk                        0            0   408000000  4294967295          0 0  
                      camera.sclk                           0            0   204000000   204000000          0 0  
                      mon.avp                               0            0   204000000   204000000          0 0  
                      wake.sclk                             0            0   204000000   204000000          0 0  
                      bsea.sclk                             0            0   204000000   204000000          0 0  
                      avp.sclk                              1            1   204000000   204000000          0 0  
                      override.sclk                         0            0   204000000   204000000          0 0  
                      floor.sclk                            0            0   204000000   204000000          0 0  
                      cap.throttle.sclk                     0            0   408000000   408000000          0 0  
                      cap.sclk                              0            0   408000000   408000000          0 0  
                      ahb.sclk                              0            0   204000000   204000000          0 0  
                         sdmmc4.sclk                        0            0   204000000   204000000          0 0  
                         vcm.ahb.sclk                       0            0   204000000   204000000          0 0  
                         usb2.sclk                          0            0   204000000   204000000          0 0  
                         usb1.sclk                          0            0   204000000   204000000          0 0  
                         usbd.sclk                          0            0   204000000   204000000          0 0  
                         apb.sclk                           0            0   102000000   102000000          0 0  
                            vcm.apb.sclk                    0            0   102000000   102000000          0 0  
                            boot.apb.sclk                   0            0   102000000   102000000          0 0  
                            qspi.sclk                       0            0   102000000   102000000          0 0  
                            sbc4.sclk                       0            0   102000000   102000000          0 0  
                            sbc3.sclk                       0            0   102000000   102000000          0 0  
                            sbc2.sclk                       0            0   102000000   102000000          0 0  
                            sbc1.sclk                       0            0   102000000   102000000          0 0  
                   hclk_div                                 1            1   204000000   204000000          0 0  
                      hclk                                  1            1   204000000   102000000          0 0  
                         pclk_div                           1            1   102000000   102000000          0 0  
                            pclk                            1            1   102000000   102000000          0 0  
                               cec                          0            0   102000000           0          0 0  
          uartd                                             0            0   408000000   408000000          0 0  
          uartc                                             0            0   408000000   408000000          0 0  
          uartb                                             0            0   408000000   408000000          0 0  
          hda                                               2            2    51000000    51000000          0 0  
          hda2codec_2x                                      2            2    48000000    48000000          0 0  
          pll_p_out_adsp                                    0            0   408000000   408000000          0 0  
          pll_p_out_cpu                                     0            0   408000000   408000000          0 0  
             pll_p_out4_div                                 0            0   102000000           0          0 0  
                pll_p_out4                                  0            0   102000000   102000000          0 0  
          dpaux1                                            0            0   408000000   408000000          0 0  
          uarta                                             1            1   408000000   408000000          0 0  
          csite                                             1            1   136000000   136000000          0 0  
          vi_sensor                                         0            0   408000000   408000000          0 0  
          soc_therm                                         1            1    51000000    51000000          0 0  
          vi_sensor2                                        0            0   408000000   408000000          0 0  
          sdmmc1                                            0            0     6000000     6000000          0 0  
          vfir                                              0            0   408000000   408000000          0 0  
          spdif_in                                          0            0   408000000   408000000          0 0  
          mselect                                           1            1   102000000   102000000          0 0  
             mselect_master                                 0            0   102000000   102000000          0 0  
                override.mselect                            0            0   102000000   102000000          0 0  
                pcie.mselect                                0            0   102000000   102000000          0 0  
                cpu.mselect                                 0            0   102000000   102000000          0 0  
             afi                                            0            0   102000000   102000000          0 0  
          host1x                                            2            2    81600000   136000000          0 0  
             host1x_master                                  1            1    81600000    81000000          0 0  
                override.host1x                             0            0    81600000   163200000          0 0  
                floor.host1x                                0            0    81600000   163200000          0 0  
                cap.vcore.host1x                            0            0   408000000  4294967295          0 0  
                cap.host1x                                  0            0   408000000   408000000          0 0  
                vii2c.host1x                                0            0    81600000   163200000          0 0  
                vi.host1x                                   0            0    81600000   163200000          0 0  
                nv.host1x                                   3            3    81600000    81000000          0 0  
          i2c5                                              1            2   136000000   136000000          0 0  
          i2c3                                              0            1    81600000    83200000          0 0  
          i2c2                                              1            1    81600000    83200000          0 0  
          i2c1                                              1            1    81600000    83200000          0 0  
          pll_p_out_hsio                                    1            1   408000000   408000000          0 0  
             pll_p_out_xusb                                 3            3   408000000   408000000          0 0  
                xusb_dev_src                                2            2   102000000   102000000          0 0  
                   xusb_dev                                 1            1   102000000    19200000          0 0  
                      xusb_dev_slcg_ovr                     0            0   102000000    19200000          0 0  
                xusb_host_src                               1            1   102000000   102000000          0 0  
                   xusb_host                                2            2   102000000    19200000          0 0  
                      xusb_host_slcg_ovr                    0            0   102000000    19200000          0 0  
                xusb_falcon_src                             1            1   204000000   204000000          0 0  
          pll_p_out5_div                                    1            1   204000000   408000000          0 0  
             pll_p_out5                                     1            1   204000000   204000000          0 0  
          pll_p_out3_div                                    1            1   102000000   408000000          0 0  
             pll_p_out3                                     1            1   102000000   102000000          0 0  
                csi                                         1            1   102000000   408000000          0 0  
                sdmmc_legacy                                0            0   102000000   408000000          0 0  
          pll_p_out1_div                                    0            0   408000000   408000000          0 0  
             pll_p_out1                                     0            0   408000000   408000000          0 0  
          pll_p_out2                                        0            0   204000000           0          0 0  
          pll_p_ud                                          0            0   408000000           0          0 0  
          sor_safe                                          8            8    24000000           0          0 0  
             sor0                                           0            0    24000000           0          0 0  
       pll_d2                                               1            1   148500000   594000000          0 0  
          pll_d2_out0                                       1            1   148500000   148500000          0 0  
             sor1_mux                                       0            0   148500000    19200000          0 0  
             disp2                                          1            1   148500000    19200000          0 0  
                disp2_slcg_ovr                              0            0   148500000    19200000          0 0  
       pll_dp                                               0            0   270000000   270000000          0 0  
       pll_c4_vco                                           0            0   998400000   998400000          0 0  
          pll_c4_out2                                       0            0   199680000    33280000          0 0  
             sdmmc4                                         0            0   199680000   200000000          0 0  
          pll_c4_out1                                       0            0   332800000    55466666          0 0  
          pll_c4_out0                                       0            0   998400000           0          0 0  
             pll_c4_out3_div                                0            0   998400000   166400000          0 0  
                pll_c4_out3                                 0            0   998400000   166400000          0 0  
       pll_e                                                2            2   100000000   100000000          0 0  
          cml1                                              0            0   100000000   100000000          0 0  
          cml0                                              0            0   100000000   100000000          0 0  
       pll_re_vco                                           1            1   672000000   672000000          0 0  
          pll_re_out1_div                                   0            0   672000000   624000000          0 0  
             pll_re_out1                                    0            0   672000000   624000000          0 0  
          pll_re_out                                        0            0   672000000   624000000          0 0  
       pll_d                                                0            0   331425000   331427343          0 0  
          pll_d_out0                                        0            0   165712500   165713671          0 0  
             pll_d_dsi_out                                  0            0   165712500   165713671          0 0  
                dsib                                        0            0   165712500   165713671          0 0  
                dsi                                         0            0   165712500   165713671          0 0  
       pll_u_vco                                            2            2   480000000   480000000          0 0  
          pll_u_480M                                        2            2   480000000   480000000          0 0  
             xusb_ss_src                                    3            3   120000000   120000000          0 0  
                xusb_ss                                     2            2   120000000    19200000          0 0  
                xusb_ssp_src                                1            1   120000000    19200000          0 0  
                xusb_hs_src                                 2            2   120000000    19200000          0 0  
                xusb_ss_div2                                0            0    60000000           0          0 0  
          pll_u_out                                         2            2   240000000   240000000          0 0  
             pll_u_out2_div                                 1            1    60000000   240000000          0 0  
                pll_u_out2                                  1            1    60000000    60000000          0 0  
                   pll_u_60M                                0            0    60000000   240000000          0 0  
             pll_u_out1_div                                 1            1    48000000   240000000          0 0  
                pll_u_out1                                  2            2    48000000    48000000          0 0  
                   pll_u_48M                                1            1    48000000   240000000          0 0  
                      xusb_fs_src                           2            2    48000000    19200000          0 0  
       pll_c3                                               0            0   268800000   268800000          0 0  
          nvdec                                             0            0   268800000   268800000          0 0  
             nvdec_slcg_ovr                                 0            0   268800000   408000000          0 0  
          nvenc                                             0            0   268800000   716800000          0 0  
             nvenc_slcg_ovr                                 0            0   268800000   408000000          0 0  
          c3bus                                             0            0   268800000           0          0 0  
             cap.vcore.c3bus                                0            0  1000000000  4294967295          0 0  
             floor.c3bus                                    0            0   268800000   307200000          0 0  
             override.c3bus                                 0            0   268800000   307200000          0 0  
             cap.throttle.c3bus                             0            0  1000000000  1000000000          0 0  
             cap.c3bus                                      0            0  1000000000  1000000000          0 0  
             nvdec.cbus                                     0            0   268800000           0          0 0  
             nvenc.cbus                                     0            0   268800000  1000000000          0 0  
       pll_c2                                               2            2   192000000   192000000          0 0  
          tsecb                                             0            0   192000000   192000000          0 0  
          se                                                0            0   192000000   192000000          0 0  
          vic03                                             1            1   192000000   192000000          0 0  
             vic03_slcg_ovr                                 0            0   192000000    19200000          0 0  
          nvjpg                                             0            0   192000000   192000000          0 0  
             nvjpg_slcg_ovr                                 0            0   192000000   408000000          0 0  
          c2bus                                             2            2   192000000   140800000          0 0  
             vic.floor.cbus                                 1            1   192000000           0          0 0  
             cap.vcore.c2bus                                0            0  1000000000  4294967295          0 0  
             edp.c2bus                                      0            0  1000000000  1000000000          0 0  
             override.c2bus                                 0            0   192000000   307200000          0 0  
             floor.c2bus                                    0            0   192000000   307200000          0 0  
             cap.throttle.c2bus                             0            0  1000000000  1000000000          0 0  
             cap.c2bus                                      0            0  1000000000  1000000000          0 0  
             tsecb.cbus                                     0            0   192000000  1000000000          0 0  
             se.cbus                                        0            0   192000000   510000000          0 0  
             nvjpg.cbus                                     0            0   192000000  1000000000          0 0  
             vic03.cbus                                     1            1   192000000   140800000          0 0  
       pll_c                                                2            2   793600000   793600000          0 0  
          vi                                                2            2   793600000   793600000          0 0  
             vi_slcg_ovr                                    0            0   793600000   408000000          0 0  
             vi_output                                      0            0   793600000           0          0 0  
          isp                                               0            0   793600000   408000000          0 0  
             ispb                                           0            0   793600000    19200000          0 0  
                ispb_slcg_ovr                               0            0   793600000    19200000          0 0  
             ispa                                           0            0   793600000    19200000          0 0  
                ispa_slcg_ovr                               0            0   793600000    19200000          0 0  
          cbus                                              1            1   793600000   793600000          0 0  
             isp.cbus                                       0            0   793600000   307200000          0 0  
                ispb.isp.cbus                               0            0   793600000  1000000000          0 0  
                ispa.isp.cbus                               0            0   793600000  1000000000          0 0  
             vi.cbus                                        1            1   793600000   307200000          0 0  
                vi_bypass.cbus                              0            0   793600000   307200000          0 0  
                vi_v4l2.cbus                                1            1   793600000  4294967295          0 0  
          pll_c_ud                                          0            0   793600000   307200000          0 0  
          pll_c_out1_div                                    0            0   793600000   307200000          0 0  
             pll_c_out1                                     0            0   793600000   307200000          0 0  
    clk_m                                                  10           10    19200000    19200000          0 0  
       tsensor                                              1            1      400000      400000          0 0  
       cclk_lp                                              0            0    19200000    19200000          0 0  
       clk_out_2_mux                                        0            0    19200000    19200000          0 0  
          clk_out_2                                         0            0    19200000    19200000          0 0  
       iqc2                                                 0            0    19200000    19200000          0 0  
       iqc1                                                 0            0    19200000    19200000          0 0  
       apb2ape                                              0            0    19200000    19200000          0 0  
       dpaux                                                0            0    19200000    19200000          0 0  
       pcie                                                 0            0    19200000    19200000          0 0  
       vim2_clk                                             0            0    19200000    19200000          0 0  
       dtv                                                  0            0    19200000    19200000          0 0  
       dp2                                                  0            0    19200000    19200000          0 0  
       csus                                                 0            0    19200000    19200000          0 0  
       usb2                                                 0            0    19200000    19200000          0 0  
       usbd                                                 0            0    19200000    19200000          0 0  
       mipi-cal                                             1            1    19200000    19200000          0 0  
       bsev                                                 0            0    19200000    19200000          0 0  
       hda2hdmi                                             2            2    19200000    19200000          0 0  
       kfuse                                                1            1    19200000    19200000          0 0  
       fuse_burn                                            0            0    19200000    19200000          0 0  
       fuse                                                 3            3    19200000    19200000          0 0  
       apbdma                                              12           12    19200000    19200000          0 0  
       timer                                                2            2    19200000    19200000          0 0  
       maud                                                 0            0    19200000    19200000          0 0  
       uartape                                              0            0     9600000     9600000          0 0  
       mipibif                                              0            0    19200000    19200000          0 0  
       qspi                                                 0            0    19200000    19200000          0 0  
          qspi_out                                          0            0    19200000    19200000          0 0  
       dbgapb                                               1            1    19200000    19200000          0 0  
       disp1                                                0            0    19200000    19200000          0 0  
          disp1_slcg_ovr                                    0            0    19200000    19200000          0 0  
       entropy                                              0            0    19200000    19200000          0 0  
       extern2                                              0            0    19200000    19200000          0 0  
       sbc3                                                 0            0    19200000    19200000          0 0  
       sbc2                                                 0            0    19200000    19200000          0 0  
       sbc1                                                 0            0    19200000    19200000          0 0  
       i2cslow                                              1            1      984616     1000000          0 0  
       actmon                                               4            4    19200000    19200000          0 0  
       dsib_lp                                              0            0    19200000    19200000          0 0  
       dsia_lp                                              0            0    19200000    19200000          0 0  
       owr                                                  0            0    19200000    19200000          0 0  
       la                                                   0            0    19200000    19200000          0 0  
       sdmmc3                                               0            0    19200000    19200000          0 0  
       spdif_out                                            0            0    19200000    19200000          0 0  
       tsec                                                 0            0    19200000    19200000          0 0  
       clk_m_div4                                           0            0     4800000     4800000          0 0  
       clk_m_div2                                           0            0     9600000     9600000          0 0

As I can see on TX2:
When running capture

vi                                                         1            1   115200000     3801600

And when stop

vi                                                         0            0   409600000   408000000

Is it abnormal ?

Thanks and Best Regards,
Vu Nguyen

Update

I tried to change setting clock in this function

ret = nvhost_module_set_rate(chan->vi->ndev, &chan->video, request_pixelrate, 0, NVHOST_PIXELRATE);

If I replace request_pixelrate with 204.000.000*4, when running capture result would be

vi                                                         1            1   115200000     102000000

If I replace request_pixelrate with 204.000.000, when running capture result would be

vi                                                         1            1   115200000     25500000

But it still run at 15fps on both cases.

Thanks and Best Regards,
Vu Nguyen