Tegra Security Engine Documentation

Hello everyone,
I’d like to know if there is any document that explains how the security engine should be used on the jetson nano.

Best Regards,
Juan Pablo.

Hi Juan,

Please refer to https://developer.nvidia.com/embedded/dlc/r32-3-1_Release_v1.0/t210ref_release_aarch64/secureboot_R32.3.1_aarch64.tbz2

Hi @kayccc,
The binaries and information you provided are for secureboot.

What I’m looking for is information about the registers and limitations for the piece of hardware used in the file drivers/crypto/tegra-se.c from the git://nv-tegra.nvidia.com/linux-nvidia.git repository.
The comment on top says it provides “Support for Tegra Security Engine hardware crypto algorithms”.

I ask for this documentation since there is a warning on that module that makes no sense to me, but I have no way of knowing if I’m introducing bugs unless I have documentation for this hardware.

I’ve already checked the “Tegra X1 Technical Reference Manual” as well as this other documentation “https://docs.nvidia.com/jetson/l4t/index.html”.

Other documents I’ve seen in pdf format are usually about things outside the SoC so they provide no useful information for this issue.

Best Regards,
Juan Pablo.

We have Trusty samples for TX2 and Xavier. Please check the document.
Samples are in

On Jetson TX1 and Nano, it is not supported.