# Tegra xhci issues

**URL:** <https://forums.developer.nvidia.com/t/tegra-xhci-issues/37200>\
**Category:** Jetson TK1\
**Created:** [March 15, 2015, 7:09am UTC](https://forums.developer.nvidia.com/t/tegra-xhci-issues/37200 "2015-03-15T07:09:24Z")\
**Posts on this page:** 4\
**Page:** 1

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**Author:** ![saiprasad3103](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@saiprasad3103](https://forums.developer.nvidia.com/u/saiprasad3103)\
**Post date:** [March 15, 2015, 7:09am UTC](https://forums.developer.nvidia.com/t/tegra-xhci-issues/37200/1 "2015-03-15T07:09:24Z")

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Hi ,

We have a NVIDIA custom board , which is similar to Jetson TK1 apart from some changes . We want to enable USB3.0 on it which uses USB3 port 0 and USB2 port 0 for USB3.0. Accordingly i have modified the padctl registers(TRM section 19.13.12.6) to select those ports and usb\_port\_owner\_info = ‘1’ but so far no success is seen.

After googling i have seen that their are some issues in Tegra xHCI and they are using patches. One of the link is as below [url][http://lwn.net/Articles/610475/[/url]](http://lwn.net/Articles/610475/%5B/url%5D).

I am using L4T21.1 release. Has anyone faced issues with the xHCI drivers? Does L421.1 require any patches for xHCI. Please note that i am using different ports . In Jetson i am able to use default ports as USB3.0 . Any help would be really appreciated.

Regards ,  
Sai

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**Author:** ![Kangalow](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@Kangalow](https://forums.developer.nvidia.com/u/Kangalow)\
**Post date:** [March 15, 2015, 5:01pm UTC](https://forums.developer.nvidia.com/t/tegra-xhci-issues/37200/2 "2015-03-15T17:01:37Z")

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I believe that for USB 3.0 the correct setting is:

usb\_port\_owner\_info=2

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<div class="post-metadata">

**Author:** ![saiprasad3103](https://developer.download.nvidia.com/images/forums/profile-default-devtalk-84.png) [@saiprasad3103](https://forums.developer.nvidia.com/u/saiprasad3103)\
**Post date:** [March 16, 2015, 4:43am UTC](https://forums.developer.nvidia.com/t/tegra-xhci-issues/37200/3 "2015-03-16T04:43:11Z")

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Hi Kangalow,

usb\_port\_owner\_info = 2 , selects USB3 port 0 and USB2 port 2. But in our case we want USB3 port 0 and USB2 port 0, hence we selected usb\_port\_owner\_info =1 . Below is the part of code in kernel which does the job

} else if (board\_info.board\_id == BOARD\_PM375) {  
if (!(usb\_port\_owner\_info & UTMI1\_PORT\_OWNER\_XUSB))  
{  
xusb\_pdata.portmap &= ~(TEGRA\_XUSB\_USB2\_P0);  
}  
if (!(usb\_port\_owner\_info & UTMI2\_PORT\_OWNER\_XUSB))  
{  
xusb\_pdata.portmap &= ~(TEGRA\_XUSB\_USB2\_P2 |  
TEGRA\_XUSB\_USB2\_P1 | TEGRA\_XUSB\_SS\_P0);  
}

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<div class="post-metadata">

**Author:** ![linuxdev](https://sea2.discourse-cdn.com/nvidia/user_avatar/forums.developer.nvidia.com/linuxdev/32/10243_2.png) [@linuxdev](https://forums.developer.nvidia.com/u/linuxdev)\
**Post date:** [March 16, 2015, 8:36pm UTC](https://forums.developer.nvidia.com/t/tegra-xhci-issues/37200/4 "2015-03-16T20:36:44Z")

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This is probably already correct, but just for sanity checks I’d confirm that the controller being used is truly the one controller capable of USB3. That aside, you may have succeeded and just not know it. Here’s part of a thread discussing some USB3 configuration reporting issues:  
[url][https://devtalk.nvidia.com/default/topic/811034/embedded-systems/kinect-2-libfreenect2-hw-acceleration-full-performance-obtained/post/4475113/#4475113[/url]](https://devtalk.nvidia.com/default/topic/811034/embedded-systems/kinect-2-libfreenect2-hw-acceleration-full-performance-obtained/post/4475113/#4475113%5B/url%5D)

You may want to read more of the thread, but the short story is that there seems to be a problem with the system working in USB3 as it should, yet reporting incorrectly that the port is only using USB2 speeds…or reporting the wrong port as USB3. If you have a way to check actual bandwidth life will be simplified.