We are designing the carrier board and I see that SYS_RESET is defined in 239 in the module data sheet.
According to my understanding, this signal already has a watchdog-like circuit on the module. On the one hand, it controls and monitors the status of the module. On the other hand, it connects to the 3.3V on the motherboard through the connector. The enable control is performed.
The reason for asking this question is that we are thinking of designing a watchdog circuit on the carrier board, such as max706 (supporting 1.8V level). But we don’t know what kind of logic this SYS_RESET is in the module. The main control comes from the module? We are also not sure whether it is possible to use a GPIO, for fear of conflicts in the module
