The memory topology and spaces in a Tegra chip

Hi,
I am working on a project for school.
I need to write a report that describes the memory topology and spaces in a Tegra
chip (Jetson) but unfortunately I can not find any article or explanation about it.
Does someone here know somewhere I can read about it?

Thanks ahead!

You might want to expand on your question since part of what you are asking is Tegra hardware, part is Linux kernel, and part is ARMv8-A architecture.